Samsung has developed a new chip-manufacturing technique that allows it to utilize current generation photolithography gear to etch ever-denser circuits. The result is higher capacity flash memory chips produced at a lower cost.
The world's largest memory chip maker showed off a 64G-bit multilevel cell (MLC) NAND flash memory chip made with an entirely new 30-nanometer production technology. A nanometer is a billionth of a meter, and the measure refers to the average size of the smallest features on the chip.
The manufacturing breakthrough, which Samsung calls self-aligned double patterning technology (SaDPT), will enable the company to greatly increase the storage capacity of new NAND flash memory chips once the technology is in commercial production.
The SaDPT technology uses two separate pattern transfers to create the circuit of each chip. By having each pattern transfer create different, overlapping parts of the chip, circuitry can be more densely packed together using existing 30nm technology.
Mass production of the 64Gb flash chip is expected to take place in 2009.
Paul Mah is a writer and blogger who lives in Singapore, where he has worked for a number of years in various capacities within the IT industry. Paul enjoys tinkering with tech gadgets, smartphones, and networking devices.