Heidelberg University

Displaying 1-21 of 21 results

  • White Papers // Jun 2012

    A New End-to-End Flow-Control Mechanism for High Performance Computing Clusters

    High Performance Computing usually leverages messaging libraries such as MPI or GASNet in order to exchange data among processes in large-scale clusters. In this paper the authors present a new flow control mechanism that is able to adapt the buffering resources used by a process according to the parallel application...

    Provided By Heidelberg University

  • White Papers // Oct 2011

    Modeling Quality Information Within Business Process Models

    Business process modeling is widely used within organizations as a method to increase awareness and knowledge of business processes and to deconstruct organizational complexity. A business process model typically visualizes activities and their dependencies, involved actors and their communication with one another and external parties. In some cases, process models...

    Provided By Heidelberg University

  • White Papers // Aug 2011

    Highly Scalable Barriers for Future High-Performance Computing Clusters

    In this paper, the authors show the suitability of their approach by analyzing the performance of barriers, a very common synchronization primitive in parallel programs. Experiments in a real cluster prototype show that their approach allows synchronization among 1024 cores spread over 64 nodes in less than 15us, several times...

    Provided By Heidelberg University

  • White Papers // Jul 2011

    Tool Support for the Comprehensive Modeling of Quality Information Within Business Process Models

    Business process modeling is commonly used to document information about structure and behavior of a business process. However, current business process modeling notations do not support well the expression of quality information relating to business processes. Organizations are interested in the capturing of quality information for quality improvement of business...

    Provided By Heidelberg University

  • White Papers // Jul 2011

    MEMSCALETM: A Scalable Environment for Databases

    In this paper the authors propose a new memory architecture for clusters referred to as MEMSCALE. This architecture provides a distributed non-coherent shared-memory view of the memory resources present in the cluster. With this aggregation technique, a given processor can directly access any memory address located at other nodes in...

    Provided By Heidelberg University

  • White Papers // Jun 2011

    Unleash Your Memory-Constrained Applications: A 32-Node Non-Coherent Distributed-Memory Prototype Cluster

    Improvements in hardware for parallel shared memory computing usually involve increments in the number of computing cores and in the amount of memory available for a given application. However, many shared-memory applications do not require more computing cores than available in current motherboards because their scalability is bounded to a...

    Provided By Heidelberg University

  • White Papers // Feb 2011

    A HT3 Platform for Rapid Prototyping and High Performance Reconfigurable Computing

    In this paper the authors present an HT3 interface for Stratix IV based FPGAs, which allows for minimal latencies and high bandwidths between processor and device and main memory and device. Designs targeting a HT connection can now be prototyped in real world systems. Furthermore, this design can be leveraged...

    Provided By Heidelberg University

  • White Papers // Dec 2010

    Aging And Decision Making: How Aging Affects Decisions Under Uncertainty

    In an aging society, it becomes more and more important to understand how aging affects decision making. Older adults have to face many situations that require consequential financial decisions. In this paper, the authors examined the effects of aging on decisions in two domains of uncertainty: risk and ambiguity. For...

    Provided By Heidelberg University

  • White Papers // Oct 2010

    Robust 3D Object Registration Without Explicit Correspondence Using Geometric Integration

    3D vision guided manipulation of components is a key problem of industrial machine vision. In this paper, the authors focus on the localization and pose estimation of known industrial objects from 3D measurements delivered by a scanning sensor. Because local information extracted from these measurements is unreliable due to noise,...

    Provided By Heidelberg University

  • White Papers // Sep 2010

    Explaining Inflation Persistence By A Time-Varying Taylor Rule

    In a simple New Keynesian model, the authors derive a closed form solution for the inflation persistence parameter as a function of the policy weights in the central bank's Taylor rule. By estimating the time-varying weights that the FED attaches to inflation and the output gap, they show that the...

    Provided By Heidelberg University

  • White Papers // Jun 2010

    Getting Rid of Coherency Overhead for Memory-Hungry Applications

    In this paper the authors present a 16-node prototype for a shared-memory cluster architecture that follows a different approach by decoupling the amount of memory available to an application from the processing resources assigned to it. In this way, they provide a new degree of freedom so that the memory...

    Provided By Heidelberg University

  • White Papers // Apr 2010

    Use of Personal Values in Requirements Engineering- A Research Preview

    The authors have presented the theory of personal values and their approach on how to support the RE process. They aim to achieve two results. First, they want to develop a theoretical description of an approach for eliciting new requirements based on values, as described. Second, they want to provide...

    Provided By Heidelberg University

  • White Papers // Mar 2010

    Mandatory Sick Pay Provision: A Labor Market Experiment

    Sick-pay is a common provision in labor contracts. It insures workers against a sudden loss of income due to unexpected absences and helps them smooth consumption. Therefore, many governments find sick-pay socially desirable and choose to mandate its provision. But sick-pay is not without its problems. Not only it suffers...

    Provided By Heidelberg University

  • White Papers // Feb 2010

    Efficient Hardware Support for the Partitioned Global Address Space

    The authors present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory. Remote memory access is possible by forwarding local load or store transactions to remote nodes. No software layers are involved in...

    Provided By Heidelberg University

  • White Papers // Feb 2010

    Defining the Quality of Business Processes

    Business process models are used to gain a joint understanding of complex processes. Often the people are applied in change projects where either the supporting IT or the processes themselves or both are to be improved. So it is an important question to assess the quality of the modeled business...

    Provided By Heidelberg University

  • White Papers // Jan 2010

    Requirements Engineering of an Access Protection

    Access protection is an important requirement for systems, which handle confidential data. This paper describes an approach for the requirements engineering of an access protection using the example of an open system. A major problem of open systems is that many users with different roles access it. Moreover, the open...

    Provided By Heidelberg University

  • White Papers // Jan 2010

    A Case for FPGA Based Accelerated Communication

    The use of Field Programmable Gate Arrays (FPGAs) in the area of High Performance Computing (HPC) to accelerate computations is well known. The authors present here a case where FPGAs can be used to speed up communication instead of computation. Current interconnects for HPC are in particular missing support for...

    Provided By Heidelberg University

  • White Papers // Oct 2009

    An FPGA-Based Custom High Performance Interconnection Network

    An FPGA-based prototype of a custom high-performance network hardware has been implemented, integrating both a switch and a network interface in one FPGA. The network interfaces to the host processor over Hyper Transport. About 85% of the slices of a Virtex IV FX100 FPGA are occupied and 10 individual clock...

    Provided By Heidelberg University

  • White Papers // Jun 2009

    An FPGA Based Verification Platform for HyperTransport 3.x

    In this paper the authors present a verification platform designed for Hyper Transport 3.x (HT3) applications. It is intended to be used in computing environments in which it is directly connected over a Hyper Transport link to the main CPUs. No protocol conversions or intermediate bridges are necessary, which results...

    Provided By Heidelberg University

  • White Papers // Feb 2009

    Efficient Virtualization of High-Performance Network Interfaces

    The architecture of modern computing systems is getting more and more parallel, in order to exploit more of the offered parallelism by applications and to increase the system's overall performance. This includes multiple cores per processor module, multi-threading techniques and the resurgence of interest in virtual machines. In spite of...

    Provided By Heidelberg University

  • White Papers // Jan 2009

    A HyperTransport 3 Physical Layer Interface for FPGAs

    This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high bandwidth point-to-point interconnect technology that can be used to directly connect hardware accelerators to AMD's Opteron CPUs. Providing support for HyperTransport 3 on FPGAs is...

    Provided By Heidelberg University

  • White Papers // Feb 2011

    A HT3 Platform for Rapid Prototyping and High Performance Reconfigurable Computing

    In this paper the authors present an HT3 interface for Stratix IV based FPGAs, which allows for minimal latencies and high bandwidths between processor and device and main memory and device. Designs targeting a HT connection can now be prototyped in real world systems. Furthermore, this design can be leveraged...

    Provided By Heidelberg University

  • White Papers // Jun 2010

    Getting Rid of Coherency Overhead for Memory-Hungry Applications

    In this paper the authors present a 16-node prototype for a shared-memory cluster architecture that follows a different approach by decoupling the amount of memory available to an application from the processing resources assigned to it. In this way, they provide a new degree of freedom so that the memory...

    Provided By Heidelberg University

  • White Papers // Feb 2010

    Efficient Hardware Support for the Partitioned Global Address Space

    The authors present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory. Remote memory access is possible by forwarding local load or store transactions to remote nodes. No software layers are involved in...

    Provided By Heidelberg University

  • White Papers // Jan 2010

    A Case for FPGA Based Accelerated Communication

    The use of Field Programmable Gate Arrays (FPGAs) in the area of High Performance Computing (HPC) to accelerate computations is well known. The authors present here a case where FPGAs can be used to speed up communication instead of computation. Current interconnects for HPC are in particular missing support for...

    Provided By Heidelberg University

  • White Papers // Oct 2009

    An FPGA-Based Custom High Performance Interconnection Network

    An FPGA-based prototype of a custom high-performance network hardware has been implemented, integrating both a switch and a network interface in one FPGA. The network interfaces to the host processor over Hyper Transport. About 85% of the slices of a Virtex IV FX100 FPGA are occupied and 10 individual clock...

    Provided By Heidelberg University

  • White Papers // Jun 2009

    An FPGA Based Verification Platform for HyperTransport 3.x

    In this paper the authors present a verification platform designed for Hyper Transport 3.x (HT3) applications. It is intended to be used in computing environments in which it is directly connected over a Hyper Transport link to the main CPUs. No protocol conversions or intermediate bridges are necessary, which results...

    Provided By Heidelberg University

  • White Papers // Dec 2010

    Aging And Decision Making: How Aging Affects Decisions Under Uncertainty

    In an aging society, it becomes more and more important to understand how aging affects decision making. Older adults have to face many situations that require consequential financial decisions. In this paper, the authors examined the effects of aging on decisions in two domains of uncertainty: risk and ambiguity. For...

    Provided By Heidelberg University

  • White Papers // Sep 2010

    Explaining Inflation Persistence By A Time-Varying Taylor Rule

    In a simple New Keynesian model, the authors derive a closed form solution for the inflation persistence parameter as a function of the policy weights in the central bank's Taylor rule. By estimating the time-varying weights that the FED attaches to inflation and the output gap, they show that the...

    Provided By Heidelberg University

  • White Papers // Mar 2010

    Mandatory Sick Pay Provision: A Labor Market Experiment

    Sick-pay is a common provision in labor contracts. It insures workers against a sudden loss of income due to unexpected absences and helps them smooth consumption. Therefore, many governments find sick-pay socially desirable and choose to mandate its provision. But sick-pay is not without its problems. Not only it suffers...

    Provided By Heidelberg University

  • White Papers // Oct 2010

    Robust 3D Object Registration Without Explicit Correspondence Using Geometric Integration

    3D vision guided manipulation of components is a key problem of industrial machine vision. In this paper, the authors focus on the localization and pose estimation of known industrial objects from 3D measurements delivered by a scanning sensor. Because local information extracted from these measurements is unreliable due to noise,...

    Provided By Heidelberg University

  • White Papers // Jul 2011

    Tool Support for the Comprehensive Modeling of Quality Information Within Business Process Models

    Business process modeling is commonly used to document information about structure and behavior of a business process. However, current business process modeling notations do not support well the expression of quality information relating to business processes. Organizations are interested in the capturing of quality information for quality improvement of business...

    Provided By Heidelberg University

  • White Papers // Oct 2011

    Modeling Quality Information Within Business Process Models

    Business process modeling is widely used within organizations as a method to increase awareness and knowledge of business processes and to deconstruct organizational complexity. A business process model typically visualizes activities and their dependencies, involved actors and their communication with one another and external parties. In some cases, process models...

    Provided By Heidelberg University

  • White Papers // Feb 2010

    Defining the Quality of Business Processes

    Business process models are used to gain a joint understanding of complex processes. Often the people are applied in change projects where either the supporting IT or the processes themselves or both are to be improved. So it is an important question to assess the quality of the modeled business...

    Provided By Heidelberg University

  • White Papers // Apr 2010

    Use of Personal Values in Requirements Engineering- A Research Preview

    The authors have presented the theory of personal values and their approach on how to support the RE process. They aim to achieve two results. First, they want to develop a theoretical description of an approach for eliciting new requirements based on values, as described. Second, they want to provide...

    Provided By Heidelberg University

  • White Papers // Jan 2010

    Requirements Engineering of an Access Protection

    Access protection is an important requirement for systems, which handle confidential data. This paper describes an approach for the requirements engineering of an access protection using the example of an open system. A major problem of open systems is that many users with different roles access it. Moreover, the open...

    Provided By Heidelberg University

  • White Papers // Jan 2009

    A HyperTransport 3 Physical Layer Interface for FPGAs

    This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high bandwidth point-to-point interconnect technology that can be used to directly connect hardware accelerators to AMD's Opteron CPUs. Providing support for HyperTransport 3 on FPGAs is...

    Provided By Heidelberg University

  • White Papers // Feb 2009

    Efficient Virtualization of High-Performance Network Interfaces

    The architecture of modern computing systems is getting more and more parallel, in order to exploit more of the offered parallelism by applications and to increase the system's overall performance. This includes multiple cores per processor module, multi-threading techniques and the resurgence of interest in virtual machines. In spite of...

    Provided By Heidelberg University

  • White Papers // Aug 2011

    Highly Scalable Barriers for Future High-Performance Computing Clusters

    In this paper, the authors show the suitability of their approach by analyzing the performance of barriers, a very common synchronization primitive in parallel programs. Experiments in a real cluster prototype show that their approach allows synchronization among 1024 cores spread over 64 nodes in less than 15us, several times...

    Provided By Heidelberg University

  • White Papers // Jun 2012

    A New End-to-End Flow-Control Mechanism for High Performance Computing Clusters

    High Performance Computing usually leverages messaging libraries such as MPI or GASNet in order to exchange data among processes in large-scale clusters. In this paper the authors present a new flow control mechanism that is able to adapt the buffering resources used by a process according to the parallel application...

    Provided By Heidelberg University

  • White Papers // Jun 2011

    Unleash Your Memory-Constrained Applications: A 32-Node Non-Coherent Distributed-Memory Prototype Cluster

    Improvements in hardware for parallel shared memory computing usually involve increments in the number of computing cores and in the amount of memory available for a given application. However, many shared-memory applications do not require more computing cores than available in current motherboards because their scalability is bounded to a...

    Provided By Heidelberg University

  • White Papers // Jul 2011

    MEMSCALETM: A Scalable Environment for Databases

    In this paper the authors propose a new memory architecture for clusters referred to as MEMSCALE. This architecture provides a distributed non-coherent shared-memory view of the memory resources present in the cluster. With this aggregation technique, a given processor can directly access any memory address located at other nodes in...

    Provided By Heidelberg University