International Journal of Engineering Sciences & Research Technology (IJESRT)

Displaying 1-40 of 547 results

  • White Papers // Jun 2015

    Evaluation of Cloud Consistency Using Auditing Algorithms

    Now-a-days, due to advantages cloud storage services become popular. Multiple replicas are stored over a wide range of geographically distributed cloud servers in order to provide always-on access service. The main drawback of such a replication technique is that it requires a high cost to achieve a strong consistency and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    NoSQL Databases: New Trend of Databases,emerging Reasons, Classification and Security Issues

    The recent growth in the internet market and the emerging of new IT technologies with new challenges and new concepts such as NoSQL which is now becomes a very popular as a replacement to the relational databases specially when working with the big data. This paper includes the introduction of...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    Adaptive Control Techniques for DC-DC Buck Converter

    DC-DC converters are some widely used power electronic circuit that efficiently converts an unregulated DC input voltage to a regulated DC output voltage. This paper demonstrates one of the basic topologies of DC-DC converter i.e. buck converter. This paper outlines the state-space averaged modelling of the DC-DC buck converter. Various...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    An Efficient Fuzzy Load Balancing Algorithm for Public Clouds

    Cloud computing is efficient and scalable but maintaining the stability of processing so many jobs in the cloud computing environment is a very complex problem with load balancing receiving much attention for researchers. Cloud computing means distributed computing. Cloud computing enables convenient, on-demand, dynamic and reliable use of distributed computing...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    Enhancement of Path Planning Algorithm With Mobile Anchor Node and Energy Efficient Data Transmission in Wireless Sensor Networks

    In wireless sensor networks due to the limitation of nodes energy, energy efficiency is an important factor should be consider when the protocols are designing. Localization is that the main sensible issue in wireless sensor networks as a result of several applications needs the sensing element to understand their actual...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    VHDL Implementation of High Speed AXI2.0 Protocol with DDR3 Controller

    With the need of application, chip with a single processor can't meet the need of more and more complex computational task. The authors are able to integrate multiple processors on a chip thanks to the development of integrated circuit manufacturing technology. This paper proposes the implementation of AXI 2.0 protocol...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2015

    Effective Data Forwarding Technique in Mobile Social Network

    In this paper, the authors aim to intend efficient data forwarding technique based on social similarity in case of Mobile Social Networks (MSNs). Mobile Social Network (MSN) with miscellaneous connectivity characteristics is a grouping of opportunistic network. Since the major difficulty of data forwarding is the mobile ad hoc network...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // May 2015

    Design and Implementation of Android Phone Based Location and File Sharing System

    The position detection and tracking system enhances the accuracy of locating friends and family member's positions by using GPS (Global Positioning System) and standard web technology. This system includes a mobile client, a repository, a web client and a map service. The mobile client is used to find location and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Monitoring Information and Control Flow on Paas for Cloud Computing Infrastructure and Services

    An adaptive distributed monitoring architecture is implemented under "MonPaaS", open source software for integrating Nagios and Google apps engine and also to evaluate the performance and scalability in cloud computing infrastructure for cloud provider and the cloud consumers. This architecture serves as a monitoring platform-as-a-service to each cloud consumer and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Safeguard of Workers Exposed to Physical Agents in Construction Sites Using WSN

    In this paper, the authors develop a system for the protection of workers employed in the building sector, exposed to critical physical agents, typical of their working scenario. The network uses GSM technology in which the distance covered by the device is unlimited. The concept has been specifically developed to...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Implementation of Smart Features and Adas for Future Automobiles

    In this paper, the authors design a system that helps to control various features of a vehicle using android and also aids in driver assistance. The communication between the vehicle and mobile is a two way communication using Bluetooth. It is mainly designed to control features such as engine on/off,...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Controlling PC Through Mobile Phone

    As all are familiar with both mobile phones and computer like home PC, laptop etc. and also all are having mobile phone with high and low prices. All know that computer can be controlled by a user by using client server basis. There are various limited options available to the...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Renewable Energy Resources to Reduce Co2 Emissions in Datacenters With Ip-Over-WDM Network in Cloud Computing

    As cloud computing consent increases, the energy consumption of the network and of the computing resources that underpin the cloud is growing and causing the emission of enormous quantities of CO2. Research is now focusing on novel "Low-carbon" cloud computing solutions. Renewable energy source are rising as a promising solution...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    Survey: Cloud Partitioning Using Load Balancing Approach for Public Cloud Infrastructure

    The term cloud computing describes distributed computing, virtualization, software, networking and web services having several elements such as clients, data enter and distributed servers etc. This includes fault tolerance, high availability, scalability, flexibility, reduced overhead for users, reduced cost of ownership, on demand services etc. is the process of distributing...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2015

    FPGA Implementation and Design of Low Power Sequential Filter

    The authors will presents the design and FPGA implementation of sequential digital 8-tap FIR filter using a novel micro programmed controller based design approach. In the paper, the FIR filter is designed for operation controls by micro programmed controller. The proposed FIR filter will be coded in VHDL using modular...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Implementation of DIC Using Association Rule Mining Algorithm

    A distributed algorithm is based on Dynamic Item set Counting (DIC) using frequent item set. Since DIC perform Apriori-based algorithms in the number of passes of the database. Hence, for reducing the total time taken to obtain the frequent data item sets. The advantage of dynamic item set counting is...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    A CAM Cell Based Concurrent BIST Architecture

    Input vector monitoring concurrent BIST (Built-In Self-Test) schemes are the class of online BIST techniques that overcomes the problems appearing separately in online and in offline BIST in a very effective way. This paper briefly presents an input vector monitoring concurrent BIST scheme, which monitors a set of vectors called...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    A Literature Review on Phishing Email Detection using Data Mining

    Fraud emails have become common problem in recent years. Fraud emails are a real threat to internet communication. In this paper, hybrid features are used for detecting fraud emails to determine how fast they have classified fraud emails and normal emails. Instead of hybrid feature, only content as a feature...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    SCADA (Supervisory Control & Data Acquisition) for Isolated Industrialized Frameworks Applications

    SCADA frameworks are generally utilized as a part of industry for supervisory control and data acquisition of mechanical methodologies. Organizations that are individuals from institutionalization boards of trustees (e.g. OPC, OLE for Process Control) and are hence setting the patterns in matters of IT advances by and large add to...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Implementation of a Flexible and Synthesizable FFT Processor

    The Fast Fourier Transform (FFT) is one of the rudimentary operations in field of digital signal and image processing. Some of the very vital applications of the fast Fourier transform include signal analysis, sound filtering, data compression, partial differential equations, multiplication of large integers, image filtering etc. Fast Fourier Transform...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Implementation of Low-Power and Area-Efficient 64bit Carry Select Adder

    Now-a-days, hottest area of research in VLSI (Very Large Scale Integration) system is design of the area, high-speed and power-efficient data path logic systems. All processor consisting of Arithmetic and Logical Unit (ALU) and adder plays an important role for design of ALU. In digital adders, the speed of addition...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Data Compression Technique using Huffman Code for Wireless Sensor Network

    A novel compression algorithm based on the principle of adaptive Huffman code is proposed in the paper to reduce the number of bits required to transmit the data of particular information. The goal of data compression is to eliminate the redundancy in a data in order to reduce its size....

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    A Survey on Keyword Query Routing in Databases

    The web is a no longer operation it is only provides a link for searching the web document based on the keyword. The query can be formed from keywords which are used to retrieve the document. It is difficult for the typical web users to exploit this web data by...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    A Novel Topology for Multilevel Inverter Using FPGA

    Multi-level inverter has been dominating the engineering field over the last few decades. However the output waveform of the present inverter possesses undesirably large harmonic content. This paper is to implement a multilevel inverter with output waveform having less total harmonic distortion. The novel topology introduced here is known as...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Transmission and Reception of Data in MIMO-OFDM System using BPSK/16-QAM Technique

    In this paper, the authors analyze both performance and transmission-reception process in MIMO-OFDM system for wireless communication. Multiple Input Multiple Output (MIMO) configurations provide enhanced capacity and high data rates in the same transmit power for any system. Orthogonal Frequency Division Multiplexing (OFDM) is a multicarrier technique that divides high...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Survey on Big Data Analysis & Processing with Data Mining Methodology

    Data mining is an analytic process designed to explore data in search of consistent patterns and/or systematic relationships between variables and then to validate the findings by applying the detected patterns to new subsets of data. Big data concern large-volume, complex, growing data sets with multiple, autonomous sources. With the...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Cluster Analysis: A Survey

    The process of grouping a set of physical or objects into classes of similar objects is called clustering. A cluster is a collection of data objects that are similar to one another within the same cluster and are dissimilar to the objects in other clusters. A cluster of data objects...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Recent Trend Based Wallace Tree Multiplier Aiming to Low Leakage Power

    A new domino circuit is proposed with low leakage and high noise immunity which decreases the parasitic capacitance on the dynamic node, yielding a smaller keeper for wide fan-in gates to implement fast and robust circuits. The technique utilized is based on comparison of mirrored current of the pull-up network...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Transmission Line Fault Analysis by Using Matlab Simulation

    Now-a-days, the demand of electricity or power is increases day-by-day this results to transmit more power by increasing the transmission line capacity from one place to the other place. But, during the transmission some faults are occurred in the system, such as L-L fault (Line-to-Line), 1L-G fault (Single Line-to-Ground) and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    A Noval Approach on Data Transmission Using WiFi

    In today's globalized world, systems, applications and people need to be permanently connected to the internet, a variety of communications networks and several different devices simultaneously. The problem of accessing data in remote areas where wired network is unreachable is solved by broadband wireless network technology. This technology has brought...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Design and Implementation of Serial Divider Using 180nm Process Technology

    In this paper, the authors present an efficient 4-bit unsigned binary serial divider and its implementation using 180nm CMOS process technology. The layout design of the serial divider circuit is efficiently optimized in terms of area. The serial divider circuit provides a good compromise between area and performance in divider...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Design and Implementation of Generic 2-D Biorthogonal Discrete Wavelet Transform on FPGA

    In this paper, the authors propose a highly scalable image compression scheme based on the Set Partitioning In Hierarchical Trees (SPIHTs) algorithm. Their algorithm, called Highly Scalable SPIHT (HS-SPIHT), supports spatial and SNR scalability and provides a bitstream that can be easily adapted (reordered) to given bandwidth and resolution requirements...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    XOR Classification

    In this paper, the authors introduces a new inequalities index, which was inspired from the simple perceptron's pattern in the Artificial Neural Networks (ANNs) scientific field and nominated by the authors Modulus Perceptron Inequalities Index (MPII). Classification is an important issue in the field of computer science research. There are...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Study of Approaches and Components of Business Intelligence

    Companies are maintaining the direct contact with the huge customers, however, emerging the number of channel oriented applications create a new data management dispute: that is useful way of integrating enterprise applications in real time of applications. To learn from the past and foretell the future, many companies are accepting...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Detailed Study of Web Mining Approaches-A Survey

    In this paper, the authors work on survey on the existing techniques of web mining and the issues which are related to it. The WWW i.e. World Wide Web acts as an interactive and trendy way to transfer information. The enormous and diverse information is available on the web, although...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Hiding of Data using Steganography Technique

    So as to have a mystery offering of information, visual cryptography plan permits imparting a mystery picture to information installed in it. Existing routines in picture steganography concentrate on implanting mystery information in high contrast pictures. "A steganography framework is generally made out of insertion and extraction. The implanted mystery...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Recent Trends in XOR Problem

    The advent of multilayer neural networks sprang from the need to implement the XOR (eXclusive OR) logic gate. Early perceptron researchers ran into a problem with XOR. The same problem as with electronic XOR circuits: multiple components were needed to achieve the XOR logic. Classification is an important issue in...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jan 2015

    Simulation of Enhanced Pulse Triggered Flip Flop with High Performance Applications

    Flip-flops are the major storage elements in all System-on-Chip (SoC) of digital design and one of the most power consumption components. It is important to reduce power dissipation in clock distribution networks and flip-flops. The power delay is mainly due to clock delays. The delay of flip-flops should be minimized...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jan 2015

    An Enhanced Upgrowth Algorithm for Temporal High Utility Item Mining

    High utility item set mining from a transactional database helps to discover the items with high utility based on profit, cost and quantity. Even though many numbers of significant algorithms have been proposed in recent years they experienced the problem of producing a large number of candidate item sets for...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jan 2015

    Improved Rough Fuzzy Possibilistic C-Means (RFPCM) Clustering Algorithm for Market Data

    Despite the wide variety of techniques available for grouping individuals into market segments, k-means clustering algorithm is the popular and widely used method. The k-means clustering algorithm aims to partitioning the given 'N' number of observations into k clusters to minimize an objective function. But the main shortcoming of k-means...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // May 2014

    Performance Comparison Between CNFET & Conventional CMOS Based Arithmetic Logic Unit

    In this paper, the authors present the implementation and analysis of Carbon Nano Tube Field Effect transistor (CNFET) and CMOS based one bit ALU. It is well known that the ALU is the key component of any processor. The functioning of the processor depends partially or as a whole on...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2014

    Area Efficient Pipelined Design for Digit-Serial FIR Filters

    FIR filters are being designed using HDL languages to enhance the speed of the system. In the whole system if the speed of the individual block is enhanced, the overall speed of the system is enhanced. In order to obtain effective utilization hardware is done by applying the pipelining technique....

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2014

    Fine Grain Dynamically Reconfigurable Architecture for CMOS SRAM

    Cell stability and area are among the major concerns in SRAM cell designs. This paper compares the performance of three SRAM cell topologies which include the conventional 6T-cell, 8T-cell and 10T-cell. The CMOS devices to achieve the better performance in terms of speed, power dissipation, size and reliability. SRAM (Static...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2014

    Hardware Implementation of Edge Detection Algorithm-A Review

    Edge is one of the most fundamental and significant feature of image. It helps the user to analyze, infer and take decision in various applications. Several edge detection algorithms are available; each one has significance based on subjective application. In this paper, edge detection algorithm is proposed to be implemented...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2014

    Wideband and Low Power CMOS Analog Multiplier in Deep Submicron Technology

    In analog signal processing the need often arises for a circuit that takes two analog inputs and produces an output proportional to their product. In this paper, CMOS four quadrant analog multiplier is designed. It is based on pair of common source amplifier, which acts as input transistor and two...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2013

    Reducing Runtime of RSA Processors Based on High-Radix Montgomery Multipliers

    Depends on various requirements the paper presents & optimized Rivest-Shamir-Adleman (RSA) processor which satisfies circuit area, operating time. The authors also introduce 3 multiplier based data path using different intermediate data forms: single form, semicarry-save form and carry-save form, and combined them with a wide variety of arithmetic components. A...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2013

    A Study of Different Approaches for Information Extraction

    There is wide growth in the field of World Wide Web (WWW). The passive amount of information is available on the internet. Due to the different kind of information structured, unstructured and semi structured and also the lack of structure of the web information sources, it becomes more difficult to...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Sep 2013

    Comparison Between Serial Adder and Parallel Adder

    Basically in digital system there are two type of circuit: combinational logic circuit and sequential logic circuit. When the authors talk about combinational circuit, this circuit is that circuit of which output depends on input like half adder, full adder and in the sequential circuit output is depend on present...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Sep 2013

    Design of Wallace Tree Multiplier Using Compressors

    A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following-high speed, low power consumption,...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2013

    Reduced Complexity Wallace Multiplier Using Parallel Prefix Adders

    The design of an area reduced and power-efficient high-speed data path logic systems are one of the most substantial areas of research in VLSI system design. In digital adders, the speed of addition is limited by the time required to propagate a carry through the adder. It works on the...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2014

    Performance Evaluation of Carry Select Adder-Review

    Arithmetic circuit is the fundamental block of many processor architectures such as digital signal processors and advanced microprocessor design. Adders form an almost mandatory component of every contemporary integrated circuit. Carry SeLect Adder (CSLA) used to achieve the fast addition operation, this is the high speed adders used in many...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2014

    Efficient Design of 4-Bit Binary Adder Using Reversible Logic Gates

    In this paper, the authors propose the design of 4-bit adder and implementation of adder Reversible logic gate to improve the design in terms of garbage outputs and delay. In the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing,...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Aug 2013

    Implementation of Energy-Efficient Low Power 10T Full-Adder

    In this paper, the performance of 10-tranistor based full adder is analyzed and compared with that of two different types of full adder based on Swing Restored Complementary Pass-transistor Logic (SR-CPL) XOR/XNOR logic gate and Double Pass-transistor Logic (DPL) based CMOS Full Adder is designed using Tanner EDA Tool based...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jan 2015

    Simulation of Enhanced Pulse Triggered Flip Flop with High Performance Applications

    Flip-flops are the major storage elements in all System-on-Chip (SoC) of digital design and one of the most power consumption components. It is important to reduce power dissipation in clock distribution networks and flip-flops. The power delay is mainly due to clock delays. The delay of flip-flops should be minimized...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Dec 2013

    To Reduce Power Consumption by Add and Shift Multipler Design Using BZFAD Architecture

    A multiplier is one of the key hardware blocks in most digital and high performance systems such as FIR filters, digital signal processors and microprocessors etc. With advances in technology, many researchers have tried and are trying to design multipliers which offer either of the following-high speed, low power consumption,...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2014

    Design of FIR Filter Using Area and Power Efficient Truncated Multiplier

    In this paper, the authors describe the design of Finite Impulse Response (FIR) using the rounded truncated multiplier which offers diminution in area, delay, and power. This anticipated method finally reduces the number of full adders and half adders during the tree reduction in the multiplier block. LSB and MSB...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Recent Trend Based Wallace Tree Multiplier Aiming to Low Leakage Power

    A new domino circuit is proposed with low leakage and high noise immunity which decreases the parasitic capacitance on the dynamic node, yielding a smaller keeper for wide fan-in gates to implement fast and robust circuits. The technique utilized is based on comparison of mirrored current of the pull-up network...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jul 2014

    Design of Modified Booth Multiplier Using Reversible Gate Logic for Radix-8

    In this paper, the authors describe the concept of multiplication by using modified booth algorithm and reversible logic functions for radix-8. By using Modified booth algorithm, less delay is produced compared to normal multiplication process. This booth algorithm also reduces the number of partial products which will reduce maximum delay...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2014

    Design and Simulation of a High Performance Multiplier Using Reversible Gates

    Multipliers are the significant part of the present technology as they are mostly used in the convolution, fast Fourier transform, CPU designing etc. The speed and power dissipation of the multiplier operation is the very important factor. The reversible logic design provide the low power dissipation hence the multiplier designed...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jun 2014

    Design of Digital Finite Impulse Response Filter Using Different Low Power Mulitipliers

    Low multipliers and adders are used to reduce dynamic power consumption of a digital Finite Impulse Response (FIR) filter. These methods include low power serial multiplier and serial adder, combinational booth multiplier, shift/add multipliers, folding transformation in linear phase architecture and applied to FIR filters to reduce power consumption and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2014

    Reversible Logic Based Arithmetic and Logic Unit

    Reversible logic has received great attention in the recent years due to its ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications in advanced computing, low power CMOS design, optical information processing, DNA computing, bio information, quantum computation and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Oct 2014

    Design & Implementation of 8x8 Multiplier Unit Using MT-CMOS Technique

    In this paper, the authors deal with various multipliers implemented using CMOS logic style and their comparative analysis on the basis of power and PDP (Power-Delay Product). A variety of multipliers have been reported in the literature but power dissipation and area used by these multiplier circuits are relatively large....

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2014

    Reduction of Multipliers in FIR Filter Using Various Algorithms-Review

    Due to the explosive growth of digital signal processing applications, the demand for high performance and low power is getting higher and higher. Finite-Impulse Response digital filters (FIR) are one of the most widely used devices in DSP systems. In signal processing applications, multiplier plays the major role. Increase in...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2013

    An Efficient Way of Decreasing the Latency of Flip Flops with Floating Point Multiplier

    In computing, floating point describes a method of representing an approximation of a real number in a way that can support a wide range of values. The numbers are, in general, represented approximately to a fixed number of significant digits (the mantissa) and scaled using an exponent. The base for...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Nov 2014

    Creating a Virtual Touch Screen Using MEMS and Flex Sensors: A Survey

    The technologies used here are MicroElectro Mechanical-Systems (MEMS), Flex sensors, Zigbee network protocol. MEM is the technology of very small devices which merges at the nano-scale into Nano Electro Mechanical-Systems (NEMS) and nanotechnology. An accelerometer is used to measure the movement of the hand. Accelerometer is an instrument for measuring...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2015

    Implementation of DIC Using Association Rule Mining Algorithm

    A distributed algorithm is based on Dynamic Item set Counting (DIC) using frequent item set. Since DIC perform Apriori-based algorithms in the number of passes of the database. Hence, for reducing the total time taken to obtain the frequent data item sets. The advantage of dynamic item set counting is...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Transmission Line Fault Analysis by Using Matlab Simulation

    Now-a-days, the demand of electricity or power is increases day-by-day this results to transmit more power by increasing the transmission line capacity from one place to the other place. But, during the transmission some faults are occurred in the system, such as L-L fault (Line-to-Line), 1L-G fault (Single Line-to-Ground) and...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Jan 2015

    An Enhanced Upgrowth Algorithm for Temporal High Utility Item Mining

    High utility item set mining from a transactional database helps to discover the items with high utility based on profit, cost and quantity. Even though many numbers of significant algorithms have been proposed in recent years they experienced the problem of producing a large number of candidate item sets for...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // May 2014

    Measurement of the Illuminance Using a Signal Conditioning Circuit

    Measuring the illuminance of light is needed in a lot of applications such as in the corrosion mapping of steel surfaces, in distance measurement and also in analytical ultra-centrifuge. Illuminance is a measure of the perceived power of light per unit area. It is a measure of light intensity that...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // May 2014

    Empirical Study of Open Source ERP Systems

    In 21st century, ERP i.e. enterprise resource planning became heart of the enterprise. It is very useful for business process. For large enterprises ERP systems are affordable, but there is a problem in case of small and middleware enterprises as it may not fit into their budget. So, especially for...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2014

    Implementation of Low Power SAR ADC Architecture Using Dual Tail Comparator

    The comparator is one of the fundamental building blocks in ADC applications. This paper presents based on comparator analysis in the ADC design to optimize power and area, maximize speed and clock frequency. According to an analytical expressions, designers can obtain an intuition about the main contributors to the comparator...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2014

    Sleepy Keeper Approach for Common Source CMOS Amplifier for Low-Leakage Power VLSI Design

    As the scaling goes deep into nano-meter range the leakage power dissipation has overtaken the dynamic power dissipation in VLSI circuits. The demand for low power consumer electronic gadgets which are portable reliable and with a long battery life has necessitated the circuits which have low power dissipation in their...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Apr 2014

    Clock Power Reduction Using Merged Flip Flops Technique

    The main constraint in any VLSI chip design are reducing power consumption and area and increasing speed. In this paper, the authors aim is to obtain reduced clock power by replacing single bit flip-flops into multi bit flip flops. To perform a co-ordinate transformation, identify those flip-flops that can be...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Mar 2014

    Implementation of High Performance Comparator in 90nm Technology

    A comparator is a circuit which compares the two analog signal and gives the output in the digital form, either logic '1' or logic '0' depending on the comparison. Comparators are most probably second most widely used electronic components after operational amplifiers in this world. Comparators are known as 1-bit...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Oct 2014

    Design and Power Evaluation of Low Power DET-STSFF

    The scaling of Complementary Metal-Oxide Semiconductor (CMOS) technology has improves the speed of the circuit, low cost and reduces area of the circuit. The integrated circuits, microcontroller, microprocessor are constructed from CMOS logic which reduces the power consumption and more immune towards noise occurring conditions. CMOS technology scaling through nanometer...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Oct 2014

    FPGA Implementation of Solid Waste Bin Monitoring and Collection system

    Solid waste management is an unavoidable issue in city areas for almost all the countries in the world. To maintain a safe and green environment for people, it is necessary to adopt an effective waste management system because disposal of wastes are drastically increasing day-by-day. Now-a-days, many technologies are being...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Oct 2014

    FPGA Implementation of NOR Flash Storage Controller

    Flash storage memory devices are NAND and NOR types which are widely used in data storage application in computers and solid states drives. Flash are nonvolatile and electrically erased and reprogrammed. A flash memory controller (or flash controller) manages the data stored on flash memory and communicates with a computer...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    A Noval Approach on Data Transmission Using WiFi

    In today's globalized world, systems, applications and people need to be permanently connected to the internet, a variety of communications networks and several different devices simultaneously. The problem of accessing data in remote areas where wired network is unreachable is solved by broadband wireless network technology. This technology has brought...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Design and Implementation of Serial Divider Using 180nm Process Technology

    In this paper, the authors present an efficient 4-bit unsigned binary serial divider and its implementation using 180nm CMOS process technology. The layout design of the serial divider circuit is efficiently optimized in terms of area. The serial divider circuit provides a good compromise between area and performance in divider...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)

  • White Papers // Feb 2015

    Design and Implementation of Generic 2-D Biorthogonal Discrete Wavelet Transform on FPGA

    In this paper, the authors propose a highly scalable image compression scheme based on the Set Partitioning In Hierarchical Trees (SPIHTs) algorithm. Their algorithm, called Highly Scalable SPIHT (HS-SPIHT), supports spatial and SNR scalability and provides a bitstream that can be easily adapted (reordered) to given bandwidth and resolution requirements...

    Provided By International Journal of Engineering Sciences & Research Technology (IJESRT)