International Journal of Engineering Trends and Technology

Displaying 1-40 of 823 results

  • White Papers // Jul 2015

    Performance Analysis of Big Data Using Outlier Detection Technique

    Clustering and classification methods used in data mining. The goal is to provide a self-contained review of the concepts and the mathematics underlying clustering techniques .This data can be stored and maintained to generate information and knowledge. This information and knowledge has to be disseminated to every stake holders for...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2015

    Blockage Control for TCP in Data-Center Systems Using ICTCP Algorithm

    The few comparing servers may send the information simultaneously around way to a particular beneficiary. For illustration, server farm applications, for example, map-reduce and seek applications are utilizing numerous to-one TCP movement design i.e. parallel information conveyance. While TCP association is ease off the simultaneous information convey. The information conveyance...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2015

    A Review on Biometric System

    The most common approach for fingerprint analysis is using minutiae that identifies corresponding features and evaluates the resemblance between two fingerprint impressions. Although many minutiae point pattern matching algorithms have been proposed, reliable automatic fingerprint verification remains as a challenging problem. Finger print recognition can be done effectively using texture...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    Implementation of Fuzzy Logic Controller Using VHDL - A Review

    In this paper, the authors deal with the literary introduction and comparative study of Fuzzy Logic Controller (FLC). In this paper, initiates with the introduction to fuzzy logic controller and moving towards its comparison to conventional and modernized implemented FLC. The FLC can be implemented by using Very high speed...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    Improved NAND Flash Memories Storage Reliablity Using Nonlinear Multi Error Correction Codes

    Multi-Level Cell (MLC) NAND flash memories are popular storage media because of their power efficiency and large storage density. Conventional reliable MLC NAND flash memories based on BCH codes or Reed-Solomon (RS) codes have a large number of undetectable and miscorrected errors. In this paper, the authors propose two general...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    DDoS Mitigation Using Software Defined Network

    Software Defined Networking (SDN) is an archetype which decouples the control plane and data plane. Data plane is used to just forward the data and control plane is used to decide how data should be forwarded. Open networking Foundation (ONF) is a group that is used in the development of...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    Identifying Misbehaving Nodes in Wireless Sensor Networks

    Dropping and modifying packets are common attacks that can be launched by way of an adversary to disrupt communication in wireless multi-hop sensor networks. Many schemes have been proposed to mitigate or tolerate such attacks, however very few can easily and successfully determine the intruders. To handle this obstacle, the...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    A Review on Denial of Service Attacks and Their Counter Measures Over MANETs

    Security and QoS in ad-hoc wireless networks have recently become very important and actively researched topics because of a growing demand to support live streaming audio and video in civilian as well as military applications. The wireless links between nodes are highly susceptible to link attacks, which include passive eavesdropping,...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    A Secure Approach to Prevent Packet Dropping and Message Tampering Attacks on AODV-Based MANETs

    In mobile wireless communication and computing technologies, Mobile Ad-hoc NETworks (MANETs) has growing demands in various applications which have also caused high and complicated security issues in transmission communication wireless networks are sensitive to problems like data tampering and dropping attacks less focused and addressed. This paper has enhanced the...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    A Comparison of Routing Protocols for MANET Using NS-2 Simulator

    Wireless connections are used in mobiles for establishing connection to various networks. A MANET is a collection of mobile users communicate over wireless links. The mobile device in MANET not only performs abilities as a host, but also as a router. The destination node can be within range of a...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2015

    Analysis and Enhancement of Adaptive Packet Technique in Wireless Sensor Network

    Wireless Sensor Network (WSN) is an application based and self-configuring type of network. All sensor nodes in WSN work cooperatively to serve the requests. The battery consumption, security, packet loss etc. are some of the major challenges of wireless sensor networks. In previous times, many techniques had been proposed to...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    NFC Based Bank Locker System

    In today's world, security in the banks has become a question of safety among the people. Keeping this in view, in this paper, the authors have implemented bank locker security system by utilizing NFC devices. NFC is mostly used in credit and debit cards for swiping purposes and also for...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Performance Enhancement of VLSI Circuits using CNTFETs

    In the world of integrated circuits, CMOS has lost its credential during scaling beyond 32nm. The main drawbacks of using CMOS transistors are high power consumption and high leakage current. Scaling causes severe Short Channel Effects (SCEs) which are difficult to suppress. As technology is scaled down, the importance of...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Data Mining and Knowledge Discovery in Database

    Knowledge discovery and data mining have become areas of growing significance because of the recent increasing demand for KDD techniques, including those used in machine learning, databases, statistics, knowledge acquisition, data visualization, and high performance computing. The motive of mining is to find a new generation of computational theories and...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Study of Various Architectures of Distributed Arithmetic

    Digital filters basically, FIR are used in many real-time and critical applications. And hence their implementation in FPGAs and ASICs is a tedious job to do. Various constraints in terms of area, power, critical path and etc. has to be solved. Distributed arithmetic is an efficient concept developed in the...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Person Identification Based on Humming Using MFCC and Correlation Concept

    In this paper, an attempt is made to identify persons with the help of their hum. Normally, speech is used as an input to the biometric system for recognition of a person, but here, instead of using speech, hum of a particular person is used for the same task. Hum...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Sophisticated Method of Analysis of Voltage Stabilizers

    Power systems are subjected to low frequency oscillations due to disturbances. Such oscillations may sustain and grow to cause system separation if adequate damping is not available. To enhance system damping, generators are equipped with Power System Stabilizers (PSSs) that provide supplementary feedback stabilizing signals in the excitation channel. The...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    An Optimized Approach in Hiding Data

    Due to advancement in communication technology the data is exchanged digitally now days. At one hand, the communication technology is improving; on the other hand the technology is also helping the attackers as a tool for unauthorized access. Thus the focus is drawn on security of data to be transmitted...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Secure Clustering Mechanism in Outsourced Databases

    The necessity to concentrate information out of disseminated information, without a former unification of the information, made the somewhat new research zone of Distributed Knowledge Discovery in Databases (DKDDs). The data mining in large databases there is hard task to maintain the confidentiality over data mining in distributed networks or...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    UPQC: A Customized Device for Power Quality Improvement in Distribution System

    Modern power system comprises of complex networks, where many generating stations and load centers are interconnected through long power transmission and distribution networks. Today due the changing trends and restructuring of power systems, the consumers are looking forward to the quality and reliability of power supply at the load centers...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Design and Simulation of PI Controller for Double Output Luo Converter

    Mirror-symmetrical double-output voltages are specially required in industrial applications and computer periphery circuits. Double output DC-DC converters can convert the positive input source voltage to positive and negative output voltages by two conversion paths. Because of the effect of parasitic elements, the output voltage and power-transfer efficiency of DC-DC converters...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Low Power Layout Design of Priority Encoder Using 65nm Technology

    In this paper, the authors provide comparative performance analysis of power and area of 4-bit priority encoder using 65nm technology. Two priority encoder approaches are presented, one with semi-custom and the other with full custom. The main objective is to compare semi-custom and full custom designed layout on the basis...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Effect of Path Planning on Flying Measured Characteristics for Quadcopter Using APM2.6 Controller

    The effect of path planning for quadcopter flying robot on flying measured characteristics velocity and flying angles (roll, pitch and yaw) have been investigated. Ardupilot-Mega 2.6 autopilot system controller is used; this controller has the ability to run many multi-rotor or Unmanned Aerial Vehicle (UAV) capable of performing GPS missions...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Modelling of Photovoltaic Using MATLAB/SIMULINK

    Due to the increasing demand of energy there is a need of power generation using renewable energy. Solar energy is essential source of renewable energy available in abundance. In this paper, modelling of PV (Photo-Voltaic) array is developed which can be used by researchers who need a simple, accurate and...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Design and Implementation of VLSI DHT Algorithm for Image Compression

    A new Very Large Scale Integration (VLSI) algorithm for a Discrete Hartley Transform (DHT) that can be efficiently implemented on a highly modular and parallel VLSI architecture having a regular structure is presented. The concurrent execution of the DHT algorithm can be achieved by splitting on several parallel parts efficiently....

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Design and Implementation of High Throughput Memory Efficient Arithmetic Coder for Image Compression Using SPIHT

    A design is proposed based on the new coding scheme for a novel image compression algorithm SPIHT (Set Partitioning In Hierarchical tree) using wavelet transform and arithmetic coder that provide an embedded code word. Image compression using SPIHT attracts more interest due its low memory requirement to represent an image....

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A CMOS Power Efficient Analog Integrated Circuits for Neural Signal Acquisition

    In this paper, design of a two stage fully differential-RC miller compensated CMOS operational amplifier and a low power low noise amplifier for neural signal recording systems is presented. In the proposed amplifiers high gain with an active feedback loop, smaller frequency noise and low power consumption is achieved by...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Hardware Realization of Single Axis Solar Tracking System by Using a Cost Effective Microcontroller

    Solar based energy harvesting techniques have been attaining enormous interest in recent years. There are basically two ways of extracting energy from solar PhotoVoltaic (PV) panels. One is by employing single axis or dual axis tracking technique and the other one is by Maximum Power Point Tracking (MPPT) methods. The...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Survey on "Energy Efficient and Secure Infrastructure for MANET Jamming Attack"

    Security is the mandatory requisition in the Mobile Ad-Hoc NETwork (MANET). Due to wireless nature, it can be easily venerable or jammed by any malicious network. But now-a-days, MANET is the most growing and very important part of the people's life system. MANET is used in various fields like military...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Efficient Algorithm for Resource Allocation with Carrier Aggregation in Downlink LTE-A Networks

    LTE-Advanced (LTE-A) is the latest set of mobile technology specifications and enhancement over LTE. Previously, submitted as candidate for 4G system to ITU-T and then upgraded in 3GPP's release 10 with specification of very high data rates. To achieve these data rates carrier aggregation technique is used in downlinks. Downlink...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Survey on Performance Factors in Wireless Sensor Networks

    The wireless sensor network has been an active research area over past few years. The diversity in the applications used in wireless sensor networks represents its great success. There are different characteristics of the topologies used in routing method. According to these characteristics, the parameters of the network are also...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Detection of Sybil Attack in Mobile Ad-Hoc Network (MANET) Using Routing Protocols: A Survey

    Mobile Ad-hoc NETwork (MANET) system is one of the broad and productive fields which have licensed exceptional criticalness. All wireless portable ad-hoc systems are described as systems with no physical associations. A MANET is a makeshift remote system made out of remote versatile hubs, with no altered framework. There are...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Energy Efficient Reliable Routing Considering Residual Energy in Wireless Ad Hoc Networks

    Two novel energy-aware routing algorithms to be proposed for wireless ad-hoc networks, called Reliable Minimum Energy Cost Routing (RMECR) and Reliable Minimum Energy Routing (RMER). RMECR addresses three important requirements of ad-hoc networks: energy-efficiency, reliability and prolonging network lifetime. It considers the energy consumption and the remaining battery energy of...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Prevention and Elimination of Gray Hole Attack in Mobile Ad-Hoc Networks by Enhanced Multipath Approach

    A wireless ad-hoc network is a temporary network set up by wireless mobile computers (or nodes) moving self-assertive in the spots that have no system foundation. Since the nodes communicate with each other, they cooperate by forwarding data packets to other nodes in the network. Security is one of the...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Sophisticated Routing Protocols Survey in the Presence of Warm Whole Attack in MANET

    Mobile Ad hoc NETwork (MANET) is a commonly correspondence in light of a scattered organization. It has an element topology and there is not any main issue for system administration. The element topology character of MANET has created it helpless and exposed to distinctive security assaults. In this paper, the...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Design and Simulation of Capacitive Fed Microstrip Antenna for GPS Applications

    In this paper, a wideband circularly polarized capacitive fed microstrip patch antenna is proposed. It is a square patch antenna truncated in opposite corners, suspended above the ground plane. The antenna structure contains capacitive feed strip which is fed by coaxial probe. The proposed structure is designed and simulated to...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Detail Review on Voice over Internet Protocol (VoIP)

    Voice over Internet Protocol (VoIP) is a new way of communicating. It is a technology that allows users to make telephone calls over an IP network. This paper will describe Voice over Internet Protocol (VoIP) to a level that allows business concerns of implementing VoIP, components of a VoIP system....

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Survey Security Threats in MANET

    The black hole trouble is one of the refuge attacks that occur in mobile ad hoc networks. The authors present two probable solutions. The primary is to discover more than one route to the purpose. The next is to develop the packet succession number included in any packet header. In...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    Pattern Synthesis of Linear Antenna Array Using Multiple Optimizaion Techiques for Wi-Max Technology

    Antenna arrays with high directivity, low side lobe levels and radiated power need to be designed for enhancement the efficiency of Wi-Max in communication systems. A new optimization algorithm Real Coded Genetic Algorithm (RCGA) is proposed for the synthesis of linear antenna arrays. The RCGA is a high performance computational...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2015

    A Comparative Review on IPv4/IPv6 Co-existence Technologies

    Internet Protocol version 4 (IPv4) addresses have been reported to be nearing exhaustion and the next generation Internet Protocol version 6 (IPv6) is gradually being deployed in the Internet. IPv6 provides a much larger address space, better address design and greater security, among other benefits. IPv6 deployment requires thorough and...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Mar 2013

    Performance Analysis of FinFET Device at 60nm

    In order to overcome lithography and performance gain challenges, new device structure for next generation technology have been proposed such as Silicon On Insulator (SOI) MOSFET, Double Gate (DG) MOSFET. A double gate FinFET device with High-K dielectric in 60nm is presented which provides high performance compared to normal MOSFET...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Oct 2013

    Design and Implementation of Coding Techniques for Communication Systems Using Viterbi Algorithm

    Convolutional encoding with Viterbi decoding is a powerful method for error checking. It has been widely deployed in many wireless communication systems to improve the limited capacity of the communication channels. The Viterbi algorithm is the most extensively employed decoding algorithm for convolution codes. In this paper, the authors present...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Sep 2013

    Design and Implementation of DDA Architecture for FIR Filters

    Traditionally, direct implementation of a K-tap FIR filter requires K Multiply-and-ACcumulate (MAC) blocks, which are expensive to implement in FPGA due to logic complexity and resource usage. To resolve this issue, the authors first present DA, which is architecture without multiplier. This paper implements the DA architecture. This architecture is...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Oct 2013

    Low Impenetrable Packed Fused Floating Point FFT with Area Optimization

    FFT processor with pipelining concept is a special processor for DFT derivation using fast innovative algorithms. This paper presents implementation of a pipelined complex fused FFT processor for multi-purpose applications. In this paper, both radix-2 and radix-4 floating point butterflies are implemented with more efficiency and with the two fused...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Sep 2013

    Implementation of Multitrack Simulator in FPGA for ESM Processor

    ESM (Electronics Support Measure) systems intercept radar emissions which are within the operating frequency range of the system. ESM system consists of antennas, front end receiver, receiver sub-system, processor sub-system and display sub-system. Antennas intercepts the RF signals which are given to front end receiver. The front end receiver gives...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Sep 2013

    Background Subtraction with Feature Extraction Based on FPGA

    Motion estimation is the hard to estimate the depth of the visual features. In the authors' paper, they implemented L-K algorithm with large scale estimations over FPGA. In their architecture, multi-scale estimation is best process for 32 frames per second and also their paper, increases accuracy and estimation. And also...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Aug 2013

    VLSI Design of a 16-Bit RISC Vector Processor for Computing Applications

    In this paper, the authors include the designing of 16-bit RISC processor and modeling of its components using VHDL. The implementation strategies have been borrowed from most popular MIPS architecture up to certain extent. The instruction set adopted here is extremely simple that gives an insight into the kind of...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Ultralow-Voltage Differential Sensing Schmitt-Trigger-Based SRAM Design

    In this paper, the authors are going to propose the differential sensing Static Random Access Memory (SRAM) bit cells for ultra-low power and ultra-low area Schmitt trigger operation. The ST-based differential sensing SRAM bit cells address the fundamental conflicting design requirement of the read versus write operation of a conventional...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Implementation of Digital Frequency Synthesizer in Communication System on FPGA

    Digital Frequency Synthesizer (DFS) is used in communication system to generate a sampled sinusoidal carrier wave. The major advantages of DFS method is that precisely and rapidly manipulate its output frequency, phase and amplitude under the control of a DSP compare to CO-ordinate Rotation DIgital Computer (CORDIC) technique, which uses...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Synthesis of a MSP430 Microcontroller Core Using Multi-Voltage Techniques

    In this paper, the authors describe regarding implementation of multi-voltage low power techniques for power improvement. Here, multi-voltage technique is applied to MSP430 16-bit microcontroller core victimization TSMC 65nm and 45nm NLDM libraries. The optimized power values area unit shown and compared among the libraries. Synopsys power compiler tool is...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Design of Vedic Multiplier for Digital Signal Processing Applications

    Multiplier is one of the most important parts in any processor speed which improves the speed of the operation like in special application processors like Digital Signal Processors (DSPs). To increase the speed of operation, the authors should take care of the precision previously, they used the floating point multipliers...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Adaptive Router Design for Networks-on-Chip on FPGA Using Buffer Resize Technique

    Compared to buses, Network-on-Chip (NoC) have a relative area and delay overhead. These can be reduced in application specific systems where heterogeneous communication infrastructure provide high bandwidth in a localized fashion and reduce under-utilized resources. For general purpose systems, design time techniques are not efficient. One important technique for improving...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    A Low Power Controlling Processor Implementing in SOC

    A System-on-Chip or System-On-Chip (SoC or SOC) is an integrated all components of a computer or other electronic systems into a single chip. This paper, describes a microcontroller processor in SOC it has been designed for embedded application. This RISC processor offers very low power consumption. This architecture is based...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jul 2013

    Optimized Multiple Word Radix-2 Montgomery Multiplication Algorithm

    Montgomery multiplication algorithm is used in the implementation of RSA and other cryptosystems based on modular arithmetic. Several improvements have been suggested to increase its suitability for hardware implementation. Radix-2 Montgomery architectures are easier to implement in hardware. In this paper, a modified optimized algorithm for radix-2 Montgomery multiplication is...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jun 2013

    Design of High Performance CPU Datapath Unit

    In this paper, the authors are going to discuss about the design and implementation of CPU data path unit on FPGA. A data-path unit commonly exists in each and every CPU. Data-path unit is collectively does all the repeated operations such as arithmetic, logical and control operations. In this paper,...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2013

    Clock Gating for Dynamic Power Reduction in Synchronous Circuits

    In this paper, clock gating technique is presented for low power VLSI (Very Large Scale Integration) circuit design. Clock in digital circuits is used for synchronization of various components. Clock power is a major source of dynamic power consumed in synchronous circuits. Clock gating is a well-known technique to reduce...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2013

    Low Power Design and Simulation of 7T SRAM Cell Using Various Circuit Techniques

    Low power memory is required today most priority with also high stability. The power is most important factor for today's technology, so the power reduction for one cell is vital role in memory design techniques. In this paper, the authors introduced some design circuit techniques for low power design. Leakage...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2013

    Comparison of Current Modes in CMOS Analog Multipliers

    Multiplication of two signals is one of the most important operations in analog signal processing. The multiplier is not only used as a computational building block but also as a programming element in system such as filters, mixers, synthesizers, converter and modulators in communication systems. These are also important for...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // May 2013

    Implementation of Area Optimized Floating Point Units in Hybrid FPGA

    This "Implementation of area optimized floating point unit in hybrid FPGA" is gradually replaces the conventional slower FPUs which have lower speed while computing complex calculations includes digital signal processing. Existing FPGA devices are not optimized for floating point computations, and for this reason, floating point operators consume a significant...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Apr 2013

    A Comparative Study of Mixed CNT Bundle with Copper for VLSI Interconnect at 32nm

    The aggressive technology scaling in VLSI leads to decrease the size of chip. Such continual miniaturization of VLSI devices has strong impact on the VLSI technology in several ways. The performance of ICs have been increased and the interconnect delay becomes much more significant. Copper interconnects have become a significant...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Apr 2013

    Design of Compressor Based Multiplier Using Degenerate Pass Transistor Logic

    In this paper, the authors propose a multiplier and compressors based on degenerate Pass Transistor Logic (PTL). Threshold loss problem are the main drawback in most pass transistor logic family. This threshold loss problem can be minimized by using the complementary control signals. These complementary control signals are obtained by...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Apr 2013

    Design of High Speed Beaumont-Smith Based Carry Select Adder

    In this paper, the authors propose a high speed carry select adder by replacing ripple carry adders with Beaumont-Smith adders. Adders are the basic building blocks in digital integrated circuit based designs. Ripple Carry Adders (RCAs) are usually preferred for addition of two multi-bit numbers as these RCAs offer fast...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Mar 2013

    Performance Analysis of Various Vedic Techniques for Multiplication

    Multiplication is an important factor in arithmetic operations and is carried out in a number of digital signal processing applications. As multipliers take a long time for execution so there is a need of fast multiplier to save the execution time. This paper describes the multiplication using ancient Indian Vedic...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Feb 2013

    Implementation of Adaptive Viterbi Decoder

    Viterbi algorithm is employed in wireless communication to decode the convolutional codes; those codes are used in every robust digital communication systems. Such decoders are complex and dissipate large amount of power. Thus, the paper presents the design of an Adaptive Viterbi Decoder (AVD) that uses survivor path with parameters...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Jan 2013

    Design of Energy Efficient Arithmetic Circuits Using Charge Recovery Adiabatic Logic

    Low power has emerged as a principle theme in today electronic industry. Energy efficiency is one of the most important features of modern electronic systems designed for high speed and portable applications. The power consumption of the electronic devices can be reduced by adopting different design styles. Adiabatic logic style...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Apr 2013

    Implementing MOD Bus and CAN Bus Protocol Conversion Interface

    A number of field buses are available to exchange the serial data among one or more controllers and a number of field devices that are communicating with each other. However, field bus standards are not uniform at present, which brings many difficulties in system design, as different equipment's from different...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Apr 2013

    Design, Analysis &Implementation of Negative High Voltage DC Power Supply Using Voltage Multiplier Circuits

    A voltage multiplier is an electrical circuit that converts AC electrical power from a lower voltage to a higher DC voltage and less current, using a network of capacitors and diodes. Voltage multipliers are widely used in many high voltage and low current applications where input voltage stability is not...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    Speed and Area Optimized Design of DDR3 SDRAM (Double Data Rate3 Synchronously Dynamic RAM) Controller for Digital TV Decoders

    Today, to store large amount of data generally, so many memory devices are available in the market. But, to access the storage data a need of retrieval devices should be needed. In this paper, to accommodate that type of task a DDR3 SDRAM is proposed. The proposed memory design is...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    A Novel Approach to Implement a Vedic Multiplier for High Speed Applications

    Now-a-days, in VLSI technology speed optimization plays a vital role. So, designing of high speed devices became necessary to fulfill the end user requirements. Generally, the processor designing is mainly depending upon the MAC units. In that particularly, multiplier architecture comes under crucial designing. In this paper, the Vedic multiplier...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    Design of Double Edge Operated Low Power Clocking System

    A new family of low power and high performance flip-flops, namely Conditional Data Mapping Flip-Flops (CDMFFs), which reduce their dynamic power by mapping their inputs to a configuration that eliminates redundant internal transitions. The authors present two CDMFFs, having differential and single-ended structures, respectively, and compare them to the state-of-the-art...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    Cost Efective and High Speed Design of DMA Memory Copy Accelerator

    Direct Memory Access (DMA) is a feature of modern computers that allows certain hardware sub-systems within the computer to access system memory independently of the Central Processing Unit (CPU). Without DMA, when the CPU is using programmed input/output, it is typically fully occupied for the entire duration of the read...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    High Speed Design of Ethernet MAC

    Now-a-days, Ethernet technology is the most widely used network technology and also widely used in plenty of industries, such as finance and business by means of its efficiency, high-speed and high performance. Gigabit Ethernet can provide communication bandwidth with 1GB/s. Because it uses the same CSMA/CD protocol, frame format, frame...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    Enhanced Multi Testability Implementation in ASIC Chips for Improving High Speed

    In this paper, the authors design an ASIC and testing by different testable techniques. It contains two vital parts; one section is testable by using of controllability testing technique and the other is tested by logic BIST. Implementation of an innovative and interactive BIST design is presented with more advanced...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Dec 2013

    A VLSI Implementation of Three-Lift Controller Based on Verilog

    The high growth of the semi-conductor industry over the past two decades has put very large scale integration in demand all over the world. The basics of digital logic theory and techniques are easily understood by the design based on VLSI technology. These are the core fundamentals of the fast...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Nov 2013

    Design of Delay Efficient Distributed Arithmetic Based Split Radix FFT

    In this paper, a split radix FFT without the use of multiplier is designed. All the complex multiplications are done by using Distributed Arithmetic (DA) technique. For faster calculation, parallel prefix adder is used. Basically high radix algorithms are developed for efficient calculation of FFT. These algorithms reduces overall arithmetic...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Nov 2013

    Power Optimized Memory Organization Using Multi-Bit-Flip-Flop Approach and Enhanced Ring Counter

    Power reduction has become a vital design goal for sophisticated design applications, whether mobile or not. Dropping power consumption in design enables better and cheaper products to be designed and power-related chip failures to be minimized. Researchers have shown that multi-bit flip-flop is an effective method for clock power consumption...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Nov 2013

    An Adaptive Instruction Decoding and Memory Efficient Pattern Identifying System Using Dual Port TCAM

    Intrusion Detection Systems (IDSs) are designed to time and it constructs a finite state machine to do so. In this paper, the authors presenting a multi-pattern matching algorithm with low area and less complexity. Before going to store patterns in database; patterns decoding is done with an efficient approach like...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Nov 2013

    Low Power Coding Approach with Error Free Coding Scheme in VLSI Design

    The low power has emerged as a principle design requirement in today's electronics industry. The need for low power consumption has become important consideration as performance and area. Even several methods exists, still there requires enhancement for optimization of power consumption in VLSI circuits. There were several approaches in circuit...

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Nov 2013

    An Efficient Pipelined FFT Processor for OFDM Communication Systems

    Increasing speeds and complexity of wireless communication systems have necessitated the progress and advancement of high performance signal processing elements. Today's emerging technologies require fast processing and efficient use of resources. These resources include power, memory and chip area. On-going research seeks to optimize resource usage as well as performance....

    Provided By International Journal of Engineering Trends and Technology

  • White Papers // Sep 2013

    Predictive OS Modeling with GLCD using Temperature Sensor for Periodic Real-Time Task Sets

    In this paper, the authors present with an ever increasing fraction of complex embedded software, efficient evaluation of software execution on target architecture at early stages of the design process is a crucial part of today's system level design methodologies. In this proposed system, they introduce predictive OS model to...

    Provided By International Journal of Engineering Trends and Technology