National Sun Yat-Sen University

Displaying 1-28 of 28 results

  • White Papers // May 2013

    A Versatile Data Cache for Trace Buffer Support

    Since the cache system has been a predominant part of modern SoC's, the authors proposes a novel approach to enhance the versatility of the data cache by making it, called D/T (Data/Trace) cache, to function both as a regular data cache and as a trace buffer for real time processor...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2013

    Software-Based Microprocessor Verification Methodology for Linux Booting

    The first program executed on the general microprocessor is the Operating System (OS) to setup and initiate the necessary mechanisms like as the cache unit, interrupt, Memory Management Unit (MMU), etc. However, OS verification is a heavy and complicate task. This paper proposes a software-based verification methodology for the microprocessor....

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2012

    Distributed Beamforming with Compressed Feedback in Time-Varying Cooperative Networks

    In this paper, the authors investigate distributed beam-forming with limited feedback for time varying cooperative network with multiple Amplify-and-Forward (AF) relays. With perfect channel state information, transmit beam-forming has been shown to achieve significant diversity and coding gain in both MIMO and cooperative systems. However, it requires large amount of...

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2012

    Ergodic Mutual Information of Amplify-and-Forward MIMO Relay Channels with LOS Components

    In this paper, the authors address the ergodic mutual information of amplify-and-forward multiple-input multiple-output two-hop relay channels. In these channels, the source terminal, relay terminal, and destination terminal are equipped with a number of correlated antennas, and there presents a line-of-sight component on each link. The models have wide applications...

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    A Performance Monitoring Tool Suite for 3D Graphics SoC Application

    Now-a-days SoC development involves both software and hardware designs. However, the performance bottleneck occurs either in software/hardware or even both. But present performance monitoring tools usually evaluates one of software/ hardware performance, which is not quite enough for nowadays SoC designs. Furthermore, due to increasing complexity of user requirements, the...

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    On Blind Sequential Detection of Misbehaving Relay

    Consider a three-node cooperative system where the relay may misbehave for selfish or adversarial reasons. The authors propose a blind sequential detection to determine relay's misbehavior with the least number of observations under requirement of detection performance. The likelihood function conditioning on the detected data symbols is derived here for...

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    Zero-Forcing Design of Precoders and Decoders in Multiuser CDMA Cooperative Networks

    Consider a multiuser cooperative CDMA networks where multiple sources transmit signals toward their respective destinations with assistance of multiple relays. The authors propose joint designs of pre-coders at relays and decoders at the destinations to eliminate MAI and improve system performance. Specifically, two sub-optimal designs of pre-coders are developed to...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2012

    A Virtual-Tree OFDMA PON System Architecture

    OFDM PON has been considered to be one of the most prominent next-generation broadband wired access solutions. However, based on the current tree-architecture, existing OFDM PON systems face severe challenges when increasing the scalability and data-rate performance. In this paper, the authors propose a novel virtual-tree architecture of an OFDMA...

    Provided By National Sun Yat-Sen University

  • White Papers // Jan 2012

    An OCP-AHB Bus Wrapper with Built-In ICE Support for SOC Integration

    As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) reuse ability increasing is the key issue to improve the time of the embedded systems development and integration. However, the different SoC design environment will affect the IPs reuse ability, such as in different system...

    Provided By National Sun Yat-Sen University

  • White Papers // Jan 2012

    A Performance Monitoring Tool Suite for Software and SoC On-Chip Bus

    Now-a-days SoC involves both software and hardware designs, performance bottleneck may occur either in software/hardware or even both. But present performance monitoring tools usually evaluates one of software/hardware performance, which is not quite enough for now-a-days SoC designs. Furthermore, due to increasing complexity of user requirements, embedded OS, such as...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2011

    Power-On Bus Tracing and Checking for SoC Verification

    As silicon technology rapidly advances, the number of IP on a single chip increase quickly and the complexity of SoC has significantly grow. Therefore, the demand of efficient verification and debugging becomes the most important issue. In the past, hardware verification and debugging are almost for a single component. For...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2011

    GPrime II - A Multi-Core Software/Hardware Co-Debug Platform

    Multi-core system is becoming the next generation embedded design platform. Heterogeneous or homogeneous processor cores integrated in a System-on-Chip (SoC) to build small form factor platforms and provide complex services, e.g., smart phones, are coming up in the horizon. Smart phones provide various domains of applications in the fashion of...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2011

    A VM-Based HW/SW Codesign Platform With Multiple Teams for the Development of 3D Graphics Application

    As today's consumer electronics get increasingly portable and ubiquitous, rising complexity succeeds to more functionalities integrated. Market dynamics and competitiveness further squeeze the time-to-market requirement, consequently pushing system designers to the very throughout consideration during the development process. Traditional development approaches could not satisfy with such compact demands. This paper...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2011

    Internet-Based Hardware/Software Co-Design Framework for Embedded 3D Graphics Applications

    Advances in technology are making it possible to run Three-Dimensional (3D) graphics applications on embedded and handheld devices. In this paper, the authors propose a hardware/software co-design environment for 3D graphics application development that includes the 3D graphics software, OpenGL ES Application Programming Interface (API), device driver, and 3D graphics...

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2010

    A Synthesizable AXI Protocol Checker for SoC Integration

    The System-on-a-Chip (SoC) design has become more and more complexly. Because difference functions components or IPs (Intellectual Property) will be integrated within a chip. The challenge of integration is \"How to verify on-chip communication properties\". Although traditional simulation-based on-chip bus protocol checking bus signals to obey bus transaction behavior or...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2010

    The Basic Block Reassembling Instruction Stream Buffer with LWBTB for X86 ISA

    The potential performance of superscalar processors can be exploited only when processor is fed with sufficient instruction bandwidth. The front-end units, the Instruction Stream Buffer (ISB) and the fetcher, are the key elements for achieving this goal. Current ISBs could not support instruction streaming beyond a basic block. In x86...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2010

    A Real-Time Power Analysis Platform for Power-Aware Embedded System Development

    In this paper the authors propose a real-time power analysis platform, including both hardware and software modules, which is capable of profiling, analyzing and controlling power behavior for power-efficient/aware embedded system applications that can be used for both educational and research purposes. The platform consists of a SoC development board...

    Provided By National Sun Yat-Sen University

  • White Papers // Jul 2009

    Debug Architecture for the En-II System Chip

    A comprehensive system debug methodology is presented, which combines the state-of-the-art support for software, functional hardware and process technology debug. The application of this methodology to the 65-nm CMOS En-II SoC is described, containing among others a high-performance ARM CPU and a TriMedia VLIW DSP. The debug requirements and implementation...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2009

    A Bottom-Up Exploration Approach for 3D Graphics Hardware Accelerator in Consumer Electronics

    3D Graphics (3DG) application is widely used in consumer electronics which is an inevitable tendency in the future. In general, the abstraction-level is used to model a complex system like 3DG SoC. However, the concerned issue is that how to use an efficient method to achieve the required performance within...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2007

    A Cache-Based Approach for Program Address Trace Compression

    Instructions trace can help designer to debug the system architecture and understand the program behavior. However, one of the major problems of tracing is the high cost of storing the traces. How to reduce the trace information or compress the trace volumes is an important issue when debugging a system....

    Provided By National Sun Yat-Sen University

  • White Papers // May 2007

    A Multi-Resolution Bus Trace Analyzer for Microprocessor-Based SoC Development

    One of the chip debugging and testing challenges is that the designer could only observe the external signals via chip I/O pins. This paper purpose an embedded AMBA signal tracer for microprocessor-based SoC's. This tracer provides five trace resolution modes that can perform a cycle-accurate or a transaction-based trace collection...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2007

    A Reconfigurable Diagnostic Infrastructure for SoCs

    Networks-on-Chip (NoCs) are a scalable interconnect solution for large-scale multiprocessor System-on-Chips (SoCs). However, little attention has been paid so far to the debugging, testing and monitoring support for NoC-based systems. This paper proposes a reconfigurable diagnostic infrastructure for SoCs. The proposed infrastructure consists of retargetable embedded In Circuit Emulator (ICE),...

    Provided By National Sun Yat-Sen University

  • White Papers // Mar 2007

    The Power Analysis Tool for an Embedded Systems Development Board

    Power consumption is an important issue for embedded system designs, especially for today's portable applications, for example, cellular phones, video cams, digital cameras, etc. Due to the quality portable application design demands high performance with low power dissipation and longer battery life. Moreover, a portable application usually uses limited power...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    An Educational Embedded System Platform for Power Analysis

    Power consumption is an important issue in the portable embedded system. However, in general courses of the embedded systems, power dissipation related issues are hardly discussed. And the generality of System-on-Chip (SoC) embedded system development learning boards do not have supporting functions such as power measurement, analysis, and management. This...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    A Real-Time Power Analysis System for an Embedded Systems Development Platform

    In designing the portable embedded system, power consumption would be an important issue. Numerous prior issues of power dissipation have been discussed, and there are fewer functions (such as power measurement, power analysis, and power management) supporting for a SoC embedded system development learning board. In order to help designer...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    Systemc Modeling for 3D Graphics Hardware Acceleration

    Due to the growing complexity of system architecture current today, the system modeling is utilized in the early design under the time-to-market. To establish a 3D graphics acceleration platform, the authors need to explore the system architecture and performance issues. In this paper, they use SystemC to model their hardware...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    A 3D Graphics SoC for Digital Television

    In this paper, the authors introduce a 3D graphics SoC for Digital TeleVision (DTV). There are three teams in charge of hardware design, software design and integration respectively. The hardware team implements all of the hardware components, and the software team ports Linux kernel to the development board and develops...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    Configurable On-Chip Real-Time Bus Tracer

    System debugging is more and more important in the era of System-on-Chip (SoC) due to design complexity and time-to-market constraints. Bus signal tracing represents that the information which are generated from the system can be collected for later observation, debugging and analysis. Because the SoC design becomes more and more...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    An Educational Embedded System Platform for Power Analysis

    Power consumption is an important issue in the portable embedded system. However, in general courses of the embedded systems, power dissipation related issues are hardly discussed. And the generality of System-on-Chip (SoC) embedded system development learning boards do not have supporting functions such as power measurement, analysis, and management. This...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2011

    Power-On Bus Tracing and Checking for SoC Verification

    As silicon technology rapidly advances, the number of IP on a single chip increase quickly and the complexity of SoC has significantly grow. Therefore, the demand of efficient verification and debugging becomes the most important issue. In the past, hardware verification and debugging are almost for a single component. For...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    Systemc Modeling for 3D Graphics Hardware Acceleration

    Due to the growing complexity of system architecture current today, the system modeling is utilized in the early design under the time-to-market. To establish a 3D graphics acceleration platform, the authors need to explore the system architecture and performance issues. In this paper, they use SystemC to model their hardware...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    A 3D Graphics SoC for Digital Television

    In this paper, the authors introduce a 3D graphics SoC for Digital TeleVision (DTV). There are three teams in charge of hardware design, software design and integration respectively. The hardware team implements all of the hardware components, and the software team ports Linux kernel to the development board and develops...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    A Real-Time Power Analysis System for an Embedded Systems Development Platform

    In designing the portable embedded system, power consumption would be an important issue. Numerous prior issues of power dissipation have been discussed, and there are fewer functions (such as power measurement, power analysis, and power management) supporting for a SoC embedded system development learning board. In order to help designer...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2006

    Configurable On-Chip Real-Time Bus Tracer

    System debugging is more and more important in the era of System-on-Chip (SoC) due to design complexity and time-to-market constraints. Bus signal tracing represents that the information which are generated from the system can be collected for later observation, debugging and analysis. Because the SoC design becomes more and more...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2007

    A Cache-Based Approach for Program Address Trace Compression

    Instructions trace can help designer to debug the system architecture and understand the program behavior. However, one of the major problems of tracing is the high cost of storing the traces. How to reduce the trace information or compress the trace volumes is an important issue when debugging a system....

    Provided By National Sun Yat-Sen University

  • White Papers // May 2007

    A Multi-Resolution Bus Trace Analyzer for Microprocessor-Based SoC Development

    One of the chip debugging and testing challenges is that the designer could only observe the external signals via chip I/O pins. This paper purpose an embedded AMBA signal tracer for microprocessor-based SoC's. This tracer provides five trace resolution modes that can perform a cycle-accurate or a transaction-based trace collection...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2007

    A Reconfigurable Diagnostic Infrastructure for SoCs

    Networks-on-Chip (NoCs) are a scalable interconnect solution for large-scale multiprocessor System-on-Chips (SoCs). However, little attention has been paid so far to the debugging, testing and monitoring support for NoC-based systems. This paper proposes a reconfigurable diagnostic infrastructure for SoCs. The proposed infrastructure consists of retargetable embedded In Circuit Emulator (ICE),...

    Provided By National Sun Yat-Sen University

  • White Papers // Mar 2007

    The Power Analysis Tool for an Embedded Systems Development Board

    Power consumption is an important issue for embedded system designs, especially for today's portable applications, for example, cellular phones, video cams, digital cameras, etc. Due to the quality portable application design demands high performance with low power dissipation and longer battery life. Moreover, a portable application usually uses limited power...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2011

    Internet-Based Hardware/Software Co-Design Framework for Embedded 3D Graphics Applications

    Advances in technology are making it possible to run Three-Dimensional (3D) graphics applications on embedded and handheld devices. In this paper, the authors propose a hardware/software co-design environment for 3D graphics application development that includes the 3D graphics software, OpenGL ES Application Programming Interface (API), device driver, and 3D graphics...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2010

    A Real-Time Power Analysis Platform for Power-Aware Embedded System Development

    In this paper the authors propose a real-time power analysis platform, including both hardware and software modules, which is capable of profiling, analyzing and controlling power behavior for power-efficient/aware embedded system applications that can be used for both educational and research purposes. The platform consists of a SoC development board...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2013

    A Versatile Data Cache for Trace Buffer Support

    Since the cache system has been a predominant part of modern SoC's, the authors proposes a novel approach to enhance the versatility of the data cache by making it, called D/T (Data/Trace) cache, to function both as a regular data cache and as a trace buffer for real time processor...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2013

    Software-Based Microprocessor Verification Methodology for Linux Booting

    The first program executed on the general microprocessor is the Operating System (OS) to setup and initiate the necessary mechanisms like as the cache unit, interrupt, Memory Management Unit (MMU), etc. However, OS verification is a heavy and complicate task. This paper proposes a software-based verification methodology for the microprocessor....

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    A Performance Monitoring Tool Suite for 3D Graphics SoC Application

    Now-a-days SoC development involves both software and hardware designs. However, the performance bottleneck occurs either in software/hardware or even both. But present performance monitoring tools usually evaluates one of software/ hardware performance, which is not quite enough for nowadays SoC designs. Furthermore, due to increasing complexity of user requirements, the...

    Provided By National Sun Yat-Sen University

  • White Papers // Jan 2012

    An OCP-AHB Bus Wrapper with Built-In ICE Support for SOC Integration

    As the design of SoC is getting more and more complicated, the IPs (Intellectual Property) reuse ability increasing is the key issue to improve the time of the embedded systems development and integration. However, the different SoC design environment will affect the IPs reuse ability, such as in different system...

    Provided By National Sun Yat-Sen University

  • White Papers // Jan 2012

    A Performance Monitoring Tool Suite for Software and SoC On-Chip Bus

    Now-a-days SoC involves both software and hardware designs, performance bottleneck may occur either in software/hardware or even both. But present performance monitoring tools usually evaluates one of software/hardware performance, which is not quite enough for now-a-days SoC designs. Furthermore, due to increasing complexity of user requirements, embedded OS, such as...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2011

    GPrime II - A Multi-Core Software/Hardware Co-Debug Platform

    Multi-core system is becoming the next generation embedded design platform. Heterogeneous or homogeneous processor cores integrated in a System-on-Chip (SoC) to build small form factor platforms and provide complex services, e.g., smart phones, are coming up in the horizon. Smart phones provide various domains of applications in the fashion of...

    Provided By National Sun Yat-Sen University

  • White Papers // Apr 2011

    A VM-Based HW/SW Codesign Platform With Multiple Teams for the Development of 3D Graphics Application

    As today's consumer electronics get increasingly portable and ubiquitous, rising complexity succeeds to more functionalities integrated. Market dynamics and competitiveness further squeeze the time-to-market requirement, consequently pushing system designers to the very throughout consideration during the development process. Traditional development approaches could not satisfy with such compact demands. This paper...

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2010

    A Synthesizable AXI Protocol Checker for SoC Integration

    The System-on-a-Chip (SoC) design has become more and more complexly. Because difference functions components or IPs (Intellectual Property) will be integrated within a chip. The challenge of integration is \"How to verify on-chip communication properties\". Although traditional simulation-based on-chip bus protocol checking bus signals to obey bus transaction behavior or...

    Provided By National Sun Yat-Sen University

  • White Papers // Feb 2009

    A Bottom-Up Exploration Approach for 3D Graphics Hardware Accelerator in Consumer Electronics

    3D Graphics (3DG) application is widely used in consumer electronics which is an inevitable tendency in the future. In general, the abstraction-level is used to model a complex system like 3DG SoC. However, the concerned issue is that how to use an efficient method to achieve the required performance within...

    Provided By National Sun Yat-Sen University

  • White Papers // Jun 2010

    The Basic Block Reassembling Instruction Stream Buffer with LWBTB for X86 ISA

    The potential performance of superscalar processors can be exploited only when processor is fed with sufficient instruction bandwidth. The front-end units, the Instruction Stream Buffer (ISB) and the fetcher, are the key elements for achieving this goal. Current ISBs could not support instruction streaming beyond a basic block. In x86...

    Provided By National Sun Yat-Sen University

  • White Papers // Jul 2009

    Debug Architecture for the En-II System Chip

    A comprehensive system debug methodology is presented, which combines the state-of-the-art support for software, functional hardware and process technology debug. The application of this methodology to the 65-nm CMOS En-II SoC is described, containing among others a high-performance ARM CPU and a TriMedia VLIW DSP. The debug requirements and implementation...

    Provided By National Sun Yat-Sen University

  • White Papers // May 2012

    A Virtual-Tree OFDMA PON System Architecture

    OFDM PON has been considered to be one of the most prominent next-generation broadband wired access solutions. However, based on the current tree-architecture, existing OFDM PON systems face severe challenges when increasing the scalability and data-rate performance. In this paper, the authors propose a novel virtual-tree architecture of an OFDMA...

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    On Blind Sequential Detection of Misbehaving Relay

    Consider a three-node cooperative system where the relay may misbehave for selfish or adversarial reasons. The authors propose a blind sequential detection to determine relay's misbehavior with the least number of observations under requirement of detection performance. The likelihood function conditioning on the detected data symbols is derived here for...

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2012

    Ergodic Mutual Information of Amplify-and-Forward MIMO Relay Channels with LOS Components

    In this paper, the authors address the ergodic mutual information of amplify-and-forward multiple-input multiple-output two-hop relay channels. In these channels, the source terminal, relay terminal, and destination terminal are equipped with a number of correlated antennas, and there presents a line-of-sight component on each link. The models have wide applications...

    Provided By National Sun Yat-Sen University

  • White Papers // Aug 2012

    Zero-Forcing Design of Precoders and Decoders in Multiuser CDMA Cooperative Networks

    Consider a multiuser cooperative CDMA networks where multiple sources transmit signals toward their respective destinations with assistance of multiple relays. The authors propose joint designs of pre-coders at relays and decoders at the destinations to eliminate MAI and improve system performance. Specifically, two sub-optimal designs of pre-coders are developed to...

    Provided By National Sun Yat-Sen University

  • White Papers // Oct 2012

    Distributed Beamforming with Compressed Feedback in Time-Varying Cooperative Networks

    In this paper, the authors investigate distributed beam-forming with limited feedback for time varying cooperative network with multiple Amplify-and-Forward (AF) relays. With perfect channel state information, transmit beam-forming has been shown to achieve significant diversity and coding gain in both MIMO and cooperative systems. However, it requires large amount of...

    Provided By National Sun Yat-Sen University