National University of Singapore

Displaying 1-40 of 179 results

  • White Papers // Nov 2014

    Joint Power Control and Fronthaul Rate Allocation for Throughput Maximization in OFDMA-Based Cloud Radio Access Network

    The performance of Cloud Radio Access Network (C-RAN) is constrained by the limited fronthaul link capacity under future heavy data traffic. To tackle this problem, extensive efforts have been devoted to design efficient signal quantization/compression techniques in the fronthaul to maximize the network throughput. However, most of the previous results...

    Provided By National University of Singapore

  • White Papers // Jul 2014

    Recent Advances in Joint Wireless Energy and Information Transfer

    In this paper, the authors provide an overview of the recent advances in microwave-enabled Wireless Energy Transfer (WET) technologies and their applications in wireless communications. Specifically, they divide their discussions into three parts. First, they introduce the state-of-the-art WET technologies and the signal processing techniques to maximize the energy transfer...

    Provided By National University of Singapore

  • White Papers // Apr 2014

    I Know Where You've Been: Geo-Inference Attacks Via the Browser Cache

    Many websites customize their services according to different geo-locations of users, to provide more relevant content and better responsiveness, including Google, Craigslist, etc. Recently, mobile devices further allow web applications to directly read users' geo-location information from GPS sensors. However, if such websites leave location-sensitive content in the browser cache,...

    Provided By National University of Singapore

  • White Papers // Feb 2014

    Effective Multi-Modal Retrieval Based on Stacked Auto-Encoders

    Multi-modal retrieval is emerging as a new search paradigm that enables seamless information retrieval from various types of media. For example, users can simply snap a movie poster to search relevant reviews and trailers. To solve the problem, a set of mapping functions are learned to project high-dimensional features extracted...

    Provided By National University of Singapore

  • White Papers // Jan 2014

    Random Number Conversion and LOCC Conversion via Restricted Storage

    The authors consider Random Number Conversion (RNC) through random number storage with restricted size. They clarify the relation between the performance of RNC and the size of storage in the framework of first- and second-order asymptotics, and derive their rate regions. Then, they show that the results for RNC with...

    Provided By National University of Singapore

  • White Papers // Jan 2014

    Ubiquitous Memory Introspection

    Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to attain. It requires time consuming simulations and detailed modeling of the memory hierarchy, often using long address traces. It is increasingly possible...

    Provided By National University of Singapore

  • White Papers // Dec 2013

    Efficient In-Memory Data Management: An Analysis

    Given the explosion of big data analytics, it is important to understand the performance costs and limitations of existing approaches for in-memory data management. Broadly, in-memory data management covers two main types of roles: supporting analytics operations such as iterative algorithms and supporting storage and retrieval operations on arbitrary key-value...

    Provided By National University of Singapore

  • White Papers // Oct 2013

    Real-time and Low Power Embedded l1-Optimization Solver Design

    Basis Pursuit DeNoising (BPDN) is an optimization method used in cutting edge computer vision and compressive sensing research. Although hosting a BPDN solver on an embedded platform is desirable because analysis can be performed in real-time, existing solvers are generally unsuitable for embedded implementation due to either poor run-time performance...

    Provided By National University of Singapore

  • White Papers // Aug 2013

    A Performance Study of Three Disk-Based Structures for Indexing and Querying Frequent Itemsets

    Frequent itemset mining is an important problem in the data mining area. Extensive efforts have been devoted to developing efficient algorithms for mining frequent itemsets. However, not much attention is paid on managing the large collection of frequent itemsets produced by these algorithms for subsequent analysis and for user exploration....

    Provided By National University of Singapore

  • White Papers // Aug 2013

    Efficient Indexing for Diverse Query Results

    In this paper, the authors examine the problem of computing diverse query results which is useful for browsing search results in online shopping applications. The search results are diversified wrt a sequence of output attributes (termed d-order) where an attribute that appears earlier in the d-order has higher priority for...

    Provided By National University of Singapore

  • White Papers // Aug 2013

    A Quantitative Evaluation of Privilege Separation in Web Browser Designs

    Privilege separation is a fundamental security concept that has been used in designing many secure systems. A number of recent works propose redesigning web browsers with greater privilege separation for better security. However, privilege-separated designs require a fine balance between security benefits and other competing concerns, such as performance. In...

    Provided By National University of Singapore

  • White Papers // Aug 2013

    MAMPSx: A Design Framework for Rapid Synthesis of Predictable Heterogeneous MPSoCs

    Heterogeneous Multi-Processor System-on-Chip (HMPSoC) is becoming popular as a means of meeting energy efficiency requirements of modern embedded systems. However, as these HMPSoCs run multimedia applications as well, they also need to meet real-time requirements. Designing these predictable HMPSoCs is a key challenge, as the current design methods for these...

    Provided By National University of Singapore

  • White Papers // Aug 2013

    Power-Performance Modeling on Asymmetric Multi-Cores

    Asymmetric multi-core architectures have recently emerged as a promising alternative in a power and thermal constrained environment. They typically integrate cores with different power and performance characteristics, which makes mapping of workloads to appropriate cores a challenging task. Limited number of performance counters and heterogeneous memory hierarchy increase the difficulty...

    Provided By National University of Singapore

  • White Papers // Jul 2013

    Run-Time Mapping for Reliable Many-Cores Based on Energy/Performance Trade-offs

    To accommodate the applications' ever-increasing demands and to achieve and exploit easily-manageable scalability, complex many-core systems are built by integrating low-cost Commercial Off-The-Shelf (COTS) components. Most recent many-core systems consist of processing nodes interconnected via Network-on-Chips (NoCs) in a mesh-based architecture. This paper presents a run-time resource manager for NoC-based...

    Provided By National University of Singapore

  • White Papers // Jul 2013

    Introduction to Malware Analysis

    Malware has become the spotlight of security threats on the virtual world. Many different kind of malware exist. Some have destruction capability such as deletion of data, while the other is more stealthy (eg. log keystrokes). The foremost goal of malware analysis is to understand malware behaviors. Through the understanding...

    Provided By National University of Singapore

  • White Papers // Jul 2013

    Aging-Aware Hardware-Software Task Partitioning for Reliable Reconfigurable Multiprocessor Systems

    Homogeneous multiprocessor systems with reconfigurable area (also known as reconfigurable multiprocessor systems) are emerging as a popular design choice in current and future technology nodes to meet the heterogeneous computing demand of a multitude of applications enabled on these platforms. Application specific mapping decisions on such a platform involve partitioning...

    Provided By National University of Singapore

  • White Papers // Jul 2013

    Enhancing VHDL Learning Through a Light-Weight Integrated Environment for Development and Automated Checking

    The development environments for Hardware Description Languages (HDLs) are essentially meant and designed for highly trained professionals/ engineers and as such are not suitable for use as an introductory tool for students learning HDLs. With students adopting a variety of operating systems, there is a need for a light-weight and...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Implementation of Core Coalition on FPGAs

    Embedded systems increasingly need to support dynamic and diverse application landscape. In response, performance asymmetric multi-cores, comprising of identical instruction-set architecture but micro-architecturally distinct set of simple and complex cores, have emerged as an attractive alternative to accommodate software diversity. Dynamic heterogeneous multi-core architectures take this concept forward by allowing...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Incorporating Energy and Throughput Awareness in Design Space Exploration and Run-time Mapping for Heterogeneous MPSoCs

    The advancement in process technology has enabled integration of different types of processing cores into a single chip towards creating heterogeneous Multi-Processor Systems-on-Chip (MPSoCs). While providing high level of computation power to support complex applications, these modern systems also introduce novel challenges for system designers, like managing a huge number...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Task Scheduling on Adaptive Multi-Core

    Multi-cores have become ubiquitous both in the general-purpose computing and the embedded domain. The current technology trends show that the number of on-chip cores is rapidly increasing, while their complexity is decreasing due to power and thermal constraints. Increasing number of simple cores enable parallel applications benefit from abundant Thread-Level...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    RAPIDITAS: RAPId Design-Space-Exploration Incorporating Trace-Based Analysis and Simulation

    Simulation-based Design Space Exploration (DSE) to evaluate all possible mappings for a given application and Multi-Processor System-on-Chip (MPSoC) platform is computationally costly for large problems. Even using efficient exploration methodologies to evaluate the mappings cannot overcome the evaluation time bottleneck. This paper presents a novel DSE methodology that analyzes the...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Energy-Aware Dynamic Reconfiguration of Communication-Centric Applications for Reliable MPSoCs

    To accommodate the ever increasing demands of applications and for the ease of scalability, Multi-Processor system-on-chips (MPSoCs) are becoming a popular design choice in current and future technologies with streaming multimedia and other communication-centric applications constituting a large fraction of the application space. Mapping and scheduling of these applications on...

    Provided By National University of Singapore

  • White Papers // May 2013

    Converse Bounds for Assorted Codes in the Finite Blocklength Regime

    The authors study converse bounds for unequal error protection codebooks with k > 1 different classes of codewords. They dub these unequal error protection codes "Assorted codes". They extend a finite blocklength converse bound due to Polyanskiy-Poor-Verdu to apply to assorted codes and use this extension to obtain a refined...

    Provided By National University of Singapore

  • White Papers // May 2013

    On the Dispersions of the Discrete Memoryless Interference Channel

    In this paper, achievable dispersions for the Discrete Memoryless Interference Channel (DM-IC) are derived. In other words, they characterize the backoff from the Han-Kobayashi (HK) achievable region, the largest inner bound known to date for the DM-IC. In addition, they also characterize the backoff from Sato's region in the strictly...

    Provided By National University of Singapore

  • White Papers // May 2013

    Efficient Routing on Multilayered Communication Networks

    The authors study the optimal routing on multilayered communication networks, which are composed of two layers of sub-networks. One is a wireless network, and the other is a wired network. They develop a simple recurrent algorithm to find an optimal routing on this kind of multilayered network, where the single-channel...

    Provided By National University of Singapore

  • White Papers // May 2013

    Communication and Migration Energy Aware Task Mapping for Reliable Multiprocessor Systems

    Heterogeneous Multi-Processor Systems-on-Chip (MPSoCs) are emerging as a promising solution in deep sub-micron technology nodes to satisfy design performance and power requirements. However, shrinking transistor geometry and aggressive voltage scaling are negatively impacting the dependability of these MPSoCs by increasing the chances of failures. This paper proposes an offline (design-time)...

    Provided By National University of Singapore

  • White Papers // Apr 2013

    A Formula for the Capacity of the General Gelfand-Pinsker Channel

    The authors consider the Gel'fand-Pinsker problem in which the channel and state are general, i.e., possibly non-stationary, non-memoryless and non-ergodic. Using the information spectrum method and a non-trivial modification of the piggyback coding lemma by Wyner, they prove that the capacity can be expressed as an optimization over the difference...

    Provided By National University of Singapore

  • White Papers // Apr 2013

    Towards General Security Support in the Browser Environment

    The web browser has evolved into a complex execution environment for rich Internet applications, providing support for advanced layout and various executable components. However, the security mechanisms in browsers do not evolve at the same pace to provide adequate protection for web applications. In this paper, the authors give a...

    Provided By National University of Singapore

  • White Papers // Mar 2013

    CoMP Meets Energy Harvesting: A New Communication and Energy Cooperation Paradigm

    In this paper, the authors investigate joint communication and energy cooperation in cellular networks for the Coordinated Multi-Point (CoMP) downlink transmission with Base Stations (BSs) powered by renewable energy. For the purpose of exposition, they consider a simplified CoMP model with two BSs cooperatively serving two Mobile Stations (MSs), where...

    Provided By National University of Singapore

  • White Papers // Mar 2013

    Multiuser MISO Beamforming for Simultaneous Wireless Information and Power Transfer

    In this paper, the authors study a multiuser Multiple-Input Single-Output (MISO) broadcast system for Simultaneous Wireless Information and Power Transfer (SWIPT), where a multi-antenna Access Point (AP) sends information and energy simultaneously via beam-forming to multiple single-antenna receivers. They maximize the weighted sum-power transferred to Energy Harvesting (EH) receivers subject...

    Provided By National University of Singapore

  • White Papers // Feb 2013

    Splash: Fast Data Dissemination With Constructive Interference in Wireless Sensor Networks

    It is well-known that the time taken for disseminating a large data object over a wireless sensor network is dominated by the overhead of resolving the contention for the underlying wireless channel. In this paper, the authors propose a new dissemination protocol called Splash that eliminates the need for contention...

    Provided By National University of Singapore

  • White Papers // Feb 2013

    Opportunistic Wireless Energy Harvesting in Cognitive Radio Networks

    Wireless networks can be self-sustaining by harvesting energy from ambient Radio-Frequency (RF) signals. Recently, researchers have made progress on designing efficient circuits and devices for RF energy harvesting suitable for low-power wireless applications. Motivated by this and building upon the classic Cognitive Radio (CR) network model, this paper proposes a...

    Provided By National University of Singapore

  • White Papers // Feb 2013

    MIMO Broadcasting for Simultaneous Wireless Information and Power Transfer

    Wireless Energy Transfer (WET) is a promising technology to provide virtually perpetual energy supplies to wireless networks. Generally speaking, WET is implementable by either the "Near-field" ElectroMagnetic (EM) induction or the "Far-field" EM radiation, for short and long range applications, respectively. In this paper, the latter case in the particular...

    Provided By National University of Singapore

  • White Papers // Feb 2013

    Wireless Information and Power Transfer: A Dynamic Power Splitting Approach

    Energy harvesting is a promising solution to prolong the operation time of energy-constrained wireless networks. In particular, scavenging energy from ambient radio signals, namely Wireless Energy Harvesting (WEH), has recently drawn significant attention. In this paper, the authors consider a point-to-point wireless link over the flat-fading channel, where the receiver...

    Provided By National University of Singapore

  • White Papers // Jan 2013

    A Novel Mode Switching Scheme Utilizing Random Beamforming for Opportunistic Energy Harvesting

    Since radio signals carry both energy and information simultaneously, a unified study on Simultaneous Wireless Information and Power Transfer (SWIPT) has recently attracted a great deal of attention for providing wireless energy to communication devices. This paper proposes a novel receiver mode switching scheme for SWIPT and the enabling transmitter...

    Provided By National University of Singapore

  • White Papers // Jan 2013

    Energy Cooperation in Cellular Networks With Renewable Powered Base Stations

    In this paper, the authors propose a model for energy cooperation between cellular Base Stations (BSs) with individual renewable energy sources, limited energy storages and connected by resistive power lines for energy sharing. When the renewable energy profile and energy demand profile at all BSs are deterministic or known ahead...

    Provided By National University of Singapore

  • White Papers // Dec 2012

    Speeding Up Ate Pairing Computation in Affine Coordinates

    At Pairing 2010, researcher's analysis showed that Ate pairing computation in affine coordinates may be much faster than projective coordinates at high security levels. In this paper, the authors further investigate techniques to speed up ate pairing computation in affine coordinates. They first analyze ate pairing computation using 4-ary miller...

    Provided By National University of Singapore

  • White Papers // Dec 2012

    Communication and Migration Energy Aware Design Space Exploration for Multicore Systems with Intermittent Faults

    Shrinking feature-size and growing transistor density are negatively impacting the dependability of Multi-Processor System-on-Chips (MPSoCs) by increasing the chances of faults (permanent, intermittent and transient). Recently, intermittent device defects are gaining significant attention among research community. These are a class of hardware faults occurring frequently but irregularly over a period...

    Provided By National University of Singapore

  • White Papers // Dec 2012

    Reliability-Driven Task Mapping for Lifetime Extension of Networks-on-Chip Based Multiprocessor Systems

    Shrinking transistor geometries, aggressive voltage scaling and higher operating frequencies have negatively impacted the lifetime reliability of embedded multi-core systems. In this paper, a convex optimization-based task-mapping technique is proposed to extend the lifetime of a Multi-Processor Systems-on-Chip (MPSoCs). The proposed technique generates mappings for every application enabled on the...

    Provided By National University of Singapore

  • White Papers // Dec 2012

    A Preference Model for Deciding the Market Share of Network Service Providers

    Started with a single best-effort service, the Internet has evolved to an ecosystem where different Service Providers (SPs), e.g., Internet Service Providers (ISPs) and Content Distribution Networks (CDNs) provide different types of services, e.g., IP transit and content caching/distribution. In this paper, the authors propose a preference model on how...

    Provided By National University of Singapore

  • White Papers // Oct 2008

    Temperature Aware Scheduling for Embedded Processors

    Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and increased leakage current. In this paper, the authors propose a temperature aware scheduling technique in the context of embedded multi-tasking systems. They observe that there...

    Provided By National University of Singapore

  • White Papers // Sep 2008

    Defining Neighborhood Relations for Fast Spatial-Temporal Partitioning of Applications on Reconfigurable Architectures

    Considering both spatial and temporal partitioning, though potentially profitable, increases the complexity of the design space of applications for run-time reconfigurable architectures. In particular, the number of ways to partition is exponential and dynamic reconfiguration cost is difficult to estimate. These difficulties are particularly challenging for the implementation of neighborhood...

    Provided By National University of Singapore

  • White Papers // Jun 2007

    Disjoint Pattern Enumeration for Custom Instructions Identification

    Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analysis of the program's dataflow graphs. The characteristics of certain applications and the modern compiler optimization techniques (e.g., loop unrolling, region formation, etc.) have lead to substantially larger dataflow...

    Provided By National University of Singapore

  • White Papers // Nov 2006

    A Retargetable Software Timing Analyzer Using Architecture Description Language

    Worst Case Execution Time (WCET) is an essential input for performance and schedulability analysis of real-time systems. Static WCET analysis requires program path analysis and microarchitecture modeling. Despite almost two decades of research, WCET analysis has not enjoyed wide acceptance in industry. This is in part due to the difficulty...

    Provided By National University of Singapore

  • White Papers // May 2006

    Modeling Out-of-Order Processors for WCET Analysis

    Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typically model the timing effects of micro-architectural features in modern processors to obtain safe and tight estimates. In this paper, the authors model out-of-order...

    Provided By National University of Singapore

  • White Papers // May 2011

    Customized MPSoC Synthesis for Task Sequence

    Multi-Processor System-on-Chip (MPSoC) platforms have become increasingly popular for high-performance embedded applications. Each Processing Element (PE) on such platforms can be tuned to match the computational demands of the tasks executing on it, creating a heterogeneous multiprocessor system. Extensible processor cores, where the base instruction-set architecture can be augmented with...

    Provided By National University of Singapore

  • White Papers // Sep 2010

    Efficient Custom Instructions Generation for System-Level Design

    Customizable embedded processors, where the processor core can be enhanced with application-specific instructions, can provide high performance similar to custom design circuits with the flexibility of software solutions. The acceptability of customizable processors, however, critically hinges on the availability of design automation tools that can identify high-quality custom instructions from...

    Provided By National University of Singapore

  • White Papers // Jul 2008

    An Efficient Framework for Dynamic Reconfiguration of Instruction-Set Customization

    The authors present an efficient framework for dynamic reconfiguration of application-specific custom instructions. A key component of this framework is an iterative algorithm for temporal and spatial partitioning of the loop kernels. Their algorithm maximizes the performance gain of an application while taking into consideration the dynamic reconfiguration cost. It...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Task Scheduling on Adaptive Multi-Core

    Multi-cores have become ubiquitous both in the general-purpose computing and the embedded domain. The current technology trends show that the number of on-chip cores is rapidly increasing, while their complexity is decreasing due to power and thermal constraints. Increasing number of simple cores enable parallel applications benefit from abundant Thread-Level...

    Provided By National University of Singapore

  • White Papers // Aug 2013

    Power-Performance Modeling on Asymmetric Multi-Cores

    Asymmetric multi-core architectures have recently emerged as a promising alternative in a power and thermal constrained environment. They typically integrate cores with different power and performance characteristics, which makes mapping of workloads to appropriate cores a challenging task. Limited number of performance counters and heterogeneous memory hierarchy increase the difficulty...

    Provided By National University of Singapore

  • White Papers // Jun 2013

    Implementation of Core Coalition on FPGAs

    Embedded systems increasingly need to support dynamic and diverse application landscape. In response, performance asymmetric multi-cores, comprising of identical instruction-set architecture but micro-architecturally distinct set of simple and complex cores, have emerged as an attractive alternative to accommodate software diversity. Dynamic heterogeneous multi-core architectures take this concept forward by allowing...

    Provided By National University of Singapore

  • White Papers // Nov 2012

    Shared Cache Aware Task Mapping for WCRT Minimization

    The Worst-Case Response Time (WCRT) of multitasking applications running on multi-cores is an important metric for real-time embedded systems. The WCRT is determined by the mapping of the tasks to the cores and the Worst-Case Execution Time (WCET) of the tasks. However, the WCET of a task is also influenced...

    Provided By National University of Singapore

  • White Papers // Oct 2012

    Lifetime Reliability Aware Architectural Adaptation

    Relentless CMOS technology scaling has resulted in increased on-chip temperature leading to serious concerns about lifetime reliability of micro-processors. Though dynamic thermal management techniques can control peak temperature, they often fail to meet the reliability targets due to the complex interplay between temperature and reliability. In this paper, the authors...

    Provided By National University of Singapore

  • White Papers // Aug 2012

    Timing Analysis of Concurrent Programs Running on Shared Cache Multi-Cores

    Memory accesses form an important source of timing unpredictability. Timing analysis of real-time embedded software thus requires bounding the time for memory accesses. Multiprocessing, a popular approach for performance enhancement, opens up the opportunity for concurrent execution. However due to contention for any shared memory by different processing cores, memory...

    Provided By National University of Singapore

  • White Papers // Mar 2011

    Automated Architecture-Aware Mapping of Streaming Applications Onto GPUs

    Graphic Processing Units (GPUs) are made up of many streaming multiprocessors, each consisting of processing cores that interleave the execution of a large number of threads. Groups of threads - called warps and wavefronts, respectively, in nVidia and AMD literature - are selected by the hardware scheduler and executed in...

    Provided By National University of Singapore

  • White Papers // Mar 2010

    Interprocedural Placement-Aware Configuration Prefetching for FPGA-Based Systems

    One of the major impediments to deploying partially run-time reconfigurable FPGAs as hardware accelerators is the time overhead involved in loading the hardware modules. While configuration prefetching is an effective method that can be employed to reduce this overhead, mis-predicted prefetches may worsen the situation by increasing the number of...

    Provided By National University of Singapore

  • White Papers // Mar 2009

    Optimal Placement-Aware Trace-Based Scheduling of Hardware Reconfigurations for FPGA Accelerators

    Modern use of FPGAs as hardware accelerators involves the partial reconfiguration of hardware resources as the application executes. In this paper, the authors present a polynomial time algorithm for scheduling reconfiguration tasks given a trace of actors (invocations of hardware kernels) that is both provably optimal and placement-aware. In addition,...

    Provided By National University of Singapore

  • White Papers // Nov 2008

    A UML-Based Approach for Heterogeneous IP Integration

    With increasing availability of predefined IP (Intellectual Properties) blocks and inexpensive microprocessors, embedded system designers are faced with more design choices than ever. On the other hand, there is a constant pressure on reducing the time to market. However, as the IP blocks are provided by different vendors, they differ...

    Provided By National University of Singapore

  • White Papers // Aug 2007

    Vosch: Voltage Scaled Cache Hierarchies

    The cache hierarchy of state-of-the-art - especially multicore - microprocessors consumes a significant amount of area and energy. A significant amount of research has been devoted especially to reducing the latter. One of the most important microarchitectural techniques proposed for the energy management is Dynamic Voltage Scaling (DVS). In DVS...

    Provided By National University of Singapore

  • White Papers // Jan 2014

    Ubiquitous Memory Introspection

    Modern memory systems play a critical role in the performance of applications, but a detailed understanding of the application behavior in the memory system is not trivial to attain. It requires time consuming simulations and detailed modeling of the memory hierarchy, often using long address traces. It is increasingly possible...

    Provided By National University of Singapore

  • White Papers // Sep 2006

    Generating Hardware From OpenMP Programs

    Various high level hardware description languages have been invented for the purpose of improving the productivity in the generation of customized hardware. Most of these languages are variants, usually parallel versions, of popular software programming languages. In this paper, the authors describe their effort to generate hardware from OpenMP, a...

    Provided By National University of Singapore

  • White Papers // Jul 2011

    Demo Abstract: Towards Bug-Free Implementations for Wireless Sensor Networks

    TinyOS has been widely used for developing Wireless Sensor Network (WSN) applications. The programming language of TinyOS applications, NesC, provides fine-grained control over the underlying devices and resources. However, due to the event-driven feature of TinyOS/NesC and the concurrent execution of sensors and computations, it could be challenging to understand,...

    Provided By National University of Singapore

  • White Papers // Nov 2010

    ES2: A Cloud Data Storage System for Supporting Both OLTP and OLAP

    Cloud computing represents a paradigm shift driven by the increasing demand of Web based applications for elastic, scalable and efficient system architectures that can efficiently support their ever-growing data volume and large-scale data analysis. A typical data management system has to deal with real-time updates by individual users, and as...

    Provided By National University of Singapore

  • White Papers // Jan 2011

    Skyline Queries Against Mobile Lightweight Devices in MANETs

    Skyline queries are well suited when retrieving data according to multiple criteria. While most previous work has assumed a centralized setting this paper considers skyline querying in a mobile and distributed setting, where each mobile device is capable of holding only a portion of the whole dataset; where devices communicate...

    Provided By National University of Singapore

  • White Papers // Aug 2011

    A Symbolic Model Checking Framework for Hierarchical Systems

    BDD-based symbolic model checking is capable of verifying systems with a large number of states. In this paper, the authors report an extensible framework to facilitate symbolic encoding and checking of hierarchical systems. Firstly, a novel library of symbolic encoding functions for compositional operators (e.g., parallel composition, sequential composition, choice...

    Provided By National University of Singapore

  • White Papers // Jul 2011

    Verification of Orchestration Systems Using Compositional Partial Order Reduction

    Orc is a computation orchestration language which is designed to specify computational services, such as distributed communication and data manipulation, in a concise and elegant way. Four concurrency primitives allow programmers to orchestrate site calls to achieve a goal, while managing timeouts, priorities, and failures. To guarantee the correctness of...

    Provided By National University of Singapore

  • White Papers // Jun 2011

    On Combining State Space Reductions With Global Fairness Assumptions

    Model checking has established itself as an effective system analysis method, as it is capable of proving/disproving properties automatically. Its application to practical systems is however limited by state space explosion. Among effective state reduction techniques are symmetry reduction and partial order reduction. Global fairness often plays a vital role...

    Provided By National University of Singapore

  • White Papers // Sep 2010

    Model-Based Methods for Linking Web Service Choreography and Orchestration

    In recent years, many Web service composition languages have been proposed. Web service choreography describes collaboration protocols of cooperating Web service participants from a global view. Web service orchestration describes collaboration of the Web services in predefined patterns based on local decision about their interactions with one another at the...

    Provided By National University of Singapore

  • White Papers // Jun 2010

    Developing Model Checkers Using PAT

    During the last two decades, model checking has emerged as an effective system analysis technique complementary to simulation and testing. Many model checking algorithms and state space reduction techniques have been proposed. Although it is desirable to have dedicated model checkers for every language (or application domain), implementing one with...

    Provided By National University of Singapore

  • White Papers // Apr 2010

    Modeling and Verification of Transmission Protocols: A Case Study on CSMA/CD Protocol

    In this paper, the authors investigate the modeling and verification of real time systems using a case study on transmission protocol, CSMA/CD. Modeling and verification of real time systems is hot research topic which has practical implications. Such systems are considered as mission critical, as its correctness within timed constraints...

    Provided By National University of Singapore

  • White Papers // Aug 2011

    Using Multi Decision Diagram in Model Checking

    Model checking is an automatic verification technique for finite concurrent systems. In this method, the assertion is verified by exhaustively searching over the state space. However, the number of states of the system will grow exponentially with the number of processes. It limits model checker to handle with complex systems....

    Provided By National University of Singapore

  • White Papers // Apr 2010

    An Automatic Approach to Verify Sensor Network Systems

    The programming language nesC for TinyOS applications supports special features of sensor network systems by providing a component-oriented programming model which is flexibly concurrent/reactive and event-driven. Sensor network systems are correctness critical since they are expected to work autonomously. Formal verification techniques such as model checking have been successfully applied...

    Provided By National University of Singapore

  • White Papers // Mar 2010

    Towards Verification of a Service Orchestration Language

    Recently, Orc is proposed as a powerful yet elegant language for distributed and concurrent programming which provides computational services such as distributed communication and data manipulation via sites. With a few concurrency primitives, programmers are able to orchestrate the invocation of sites to achieve a goal, and meanwhile, manage timeouts,...

    Provided By National University of Singapore

  • White Papers // Apr 2010

    Model Checking C# Code: A Translation Approach

    Extracting model from source code helps to ensure the implementation in accord with design. The properties of interest can be checked on implemented system via the extracted model. Previous approaches usually abstract the source at the level of intermediate language or assembly code. The authors are building a module to...

    Provided By National University of Singapore

  • White Papers // Sep 2009

    Scalable Multi-Core Model Checking Fairness Enhanced Systems

    Rapid development in hardware industry has brought the prevalence of multi-core systems with shared-memory, which enabled the speedup of various tasks by using parallel algorithms. The Linear Temporal Logic (LTL) model checking problem is one of the difficult problems to be parallelized or scaled up to multi-core. In this paper,...

    Provided By National University of Singapore

  • White Papers // Sep 2011

    Towards Efficient Proofs of Retrievability in Cloud Storage

    Backuping data in a cloud storage, for example Amazon Cloud Drive, Microsoft Skydrive, or Drop-box, is gaining popularity recently. The authors are considering scenarios where users may have concerns of the integrity of their data stored in the cloud storage. Such prudent users may not be simply satisfied with the...

    Provided By National University of Singapore

  • White Papers // Jul 2011

    Towards a Model Checker for NesC and Wireless Sensor Networks

    Wireless Sensor Networks (WSNs) are expected to run unattendedly for critical tasks. To guarantee the correctness of WSNs is important, but highly nontrivial due to the distributed nature. In this paper, the authors present an automatic approach to directly verify WSNs built with TinyOS applications implemented in the NesC language....

    Provided By National University of Singapore

  • White Papers // Nov 2010

    Govt To Study Gambling Habits Of Those Aged Above 55

    The Government wants to know more about the gambling habits of older people. It is doing a survey to find out how many people aged above 55 gamble, why some are drawn to gambling while others are put off by it. Counselors called the survey timely, saying most of the...

    Provided By National University of Singapore

  • White Papers // Dec 2009

    Forthcoming 2009 Journal Of Financial And Quantitative Analysis

    Staleness in measured prices imparts a positive statistical bias and a negative dilution effect on mutual fund performance. First, evaluating performance with non-synchronous data generates a spurious component of alpha. Second, stale prices create arbitrage opportunities for high-frequency traders whose trades dilute the portfolio returns and hence fund performance. This...

    Provided By National University of Singapore

  • White Papers // Jul 2009

    Monetizing Housing Equity To Generate Retirement Incomes

    The public housing program and the unique way of financing housing through the mandatory savings system in Singapore have created a class of homeowners. This paper compares the instruments available to different flat owners to monetize their assets, including the Lease Buyback Scheme (LBS), subletting, downsizing and reverse mortgage. The...

    Provided By National University of Singapore