Reed Business Information

Displaying 1-40 of 337 results

  • White Papers // May 2014

    Adaptive Preshuffling in Hadoop Clusters

    MapReduce has become an important distributed processing model for large-scale data-intensive applications like data mining and web indexing. Hadoop - an open-source implementation of MapReduce is widely used for short jobs requiring low response time. In this paper, the authors proposed a new preshuffling strategy in Hadoop to reduce high...

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  • White Papers // Apr 2014

    Optimal Sequential Wireless Relay Placement on a Random Lattice Path

    The authors' paper is motivated by impromptu (or \"As-you-go\") deployment of wireless relay nodes along a path, a need that arises in many situations. In this paper, the path is modeled as starting at the origin (where there is the data sink, e.g., the control center), and evolving randomly over...

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  • White Papers // Feb 2014

    Terahertz Band: Next Frontier for Wireless Communications

    In this paper, the authors provide an in-depth view of Terahertz band (0.1 - 10THz) communication, which is envisioned as a key technology to satisfy the increasing demand for higher speed wireless communication. THz band communication will alleviate the spectrum scarcity and capacity limitations of current wireless systems, and enable...

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  • White Papers // Jan 2014

    A Survey of Intrusion Detection in Wireless Network Applications

    Information systems are becoming more integrated into the people lives. As this integration deepens, the importance of securing these systems increases. Because of lower installation and maintenance costs, many of these systems are largely networked by wireless means. In order to identify gaps and propose research directions in wireless network...

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  • White Papers // Jan 2014

    EnhancedBit: Unleashing the Potential of the Unchoking Policy in the BitTorrent Protocol

    In this paper, the authors propose a modification to the BitTorrent protocol related to its peer unchoking policy. In particular, they apply a novel optimistic unchoking approach that improves the quality of inter-connections amongst peers, i.e., increases the number of directly-connected and interested-in-cooperation peers without penalizing underutilized and/or idle peers....

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  • White Papers // Dec 2013

    Resilience Articulation Point (RAP): Cross-Layer Dependability Modeling for Nanometer System-on-Chip Resilience

    The Resilience Articulation Point (RAP) model aims at provisioning researchers and developers with a probabilistic fault abstraction and error propagation framework covering all hardware/software layers of a System-on-Chip (SoC). RAP assumes that physically induced faults at the technology or CMOS device layer will eventually manifest themselves as a single or...

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  • White Papers // Nov 2013

    Unified Reliability Estimation and Management of NoC Based Chip Multiprocessors

    The authors present a new architecture level unified reliability evaluation methodology for Chip Multi-Processors (CMPs). The proposed Reliability ESTimation (REST) is based on a Monte Carlo algorithm. What distinguishes REST from the previous work is that both the computational and communication components are considered in a unified manner to compute...

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  • White Papers // Nov 2013

    LTE-Advanced and the Evolution to Beyond 4G (B4G) Systems

    Cellular networks have been undergoing an extraordinarily fast evolution in the past years. With commercial deployments of Release 8 (Rel-8) Long Term Evolution (LTE) already being carried out worldwide, a significant effort is being put forth by the research and standardization communities on the development and specification of LTE-advanced. The...

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  • White Papers // Nov 2013

    Tibidabo: Making the Case for an ARM-Based HPC System

    It is widely accepted that future HPC systems will be limited by their power consumption. Current HPC systems are built from commodity server processors, designed over years to achieve maximum performance, with energy efficiency being an after-thought. In this paper, the authors advocate a different approach: building HPC systems from...

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  • White Papers // Nov 2013

    Design Configuration Selection for Hard-Error Reliable Processors Via Statistical Rules

    Lifetime reliability is becoming a first-order concern in processor manufacturing in addition to conventional design goals including performance, power consumption and thermal features since semiconductor technology enters the deep submicron era. This paper requires computer architects to carefully examine each design option and evaluate its reliability, in order to prolong...

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  • White Papers // Nov 2013

    A Two-Phase Design Space Exploration Strategy for System-Level Real-Time Application Mapping Onto MPSoC

    In this paper, the authors present a two-phase Design Space Exploration (DSE) approach to address the problem of real-time application mapping on a flexible MPSoC platform. Their approach is composed of two independent phases - analytical estimation/pruning and system simulation - communicating via a well-defined interface. The strength of the...

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  • White Papers // Oct 2013

    Computational Cost Analysis on Securing RFID Protocols Conforming to EPC Class-1 Generation-2 Standard

    A Radio Frequency IDentification (RFID) system is a contactless automatic identification system that uses small and low-cost tags. RFID systems communicate with the tags attached to the objects using radio frequency waves. The major problem with RFID systems is security problem because the communication between RFID components is wireless. In...

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  • White Papers // Oct 2013

    Demand-Based Schedulability Analysis for Real-Time Multi-Core Scheduling

    In real-time systems, schedulability analysis has been widely studied to provide offline guarantees on temporal correctness, producing many analysis methods. The demand-based schedulability analysis method has a great potential for high schedulability performance and broad applicability. However, such a potential is not yet fully realized for real-time multi-core scheduling mainly...

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  • White Papers // Oct 2013

    The COMPLEX Methodology for UML/MARTE Modeling and Design Space Exploration of Embedded Systems

    The design of embedded systems is in a highly competitive context. The translation of an efficient design into a successful product highly depends on becoming the first product in the market with new complex functionalities fulfilling tight performance constraints, and at an affordable price. In this paper, the task of...

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  • White Papers // Sep 2013

    Onion Routing Circuit Construction Via Latency Graphs

    The use of anonymity-based infrastructures and anonymisers is a plausible solution to mitigate privacy problems on the Internet. Tor (short for the onion router) is a popular low-latency anonymity system that can be installed as an end-user application on a wide range of operating systems to redirect the traffic through...

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  • White Papers // Sep 2013

    DeSyRe: On-Demand System Reliability

    The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face...

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  • White Papers // Sep 2013

    Multi-Objective Scheduling of Many Tasks in Cloud Platforms

    The scheduling of a many-task workflow in a distributed computing platform is a well known NP-hard problem. The problem is even more complex and challenging when the virtualized clusters are used to execute a large number of tasks in a cloud computing platform. The difficulty lies in satisfying multiple objectives...

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  • White Papers // Aug 2013

    A Survey on Vehicular Cloud Computing

    Vehicular networking has become a significant research area due to its specific features and applications such as standardization, efficient traffic management, road safety and infotainment. Vehicles are expected to carry relatively more communication systems, on board computing facilities, storage and increased sensing power. Hence, several technologies have been deployed to...

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  • White Papers // Aug 2013

    SE-AKA: A Secure and Efficient Group Authentication and Key Agreement Protocol for LTE Networks

    To support Evolved Packet System (EPS) in the Long Term Evolution (LTE) networks, the 3rd Generation Partnership Project (3GPP) has proposed an Authentication and Key Agreement (AKA) protocol, named EPS-AKA, which has become an emerging standard for Fourth-Generation (4G) wireless communications. However, due to the requirement of backward compatibility, EPS-AKA...

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  • White Papers // Aug 2013

    Online Scheduling and Placement of Hardware Tasks With Multiple Variants on Dynamically Reconfigurable Field-Programmable Gate Arrays

    Hardware task scheduling and placement at runtime plays a crucial role in achieving better system performance by exploring dynamically reconfigurable Field-Programmable Gate Arrays (FPGAs). Although a number of online algorithms have been proposed in the literature, no strategy has been engaged in efficient usage of reconfigurable resources by orchestrating multiple...

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  • White Papers // Aug 2013

    A System-Level Approach to Adaptivity and Fault-Tolerance in NoC-Based MPSoCs: The MADNESS Project

    Modern embedded systems increasingly require adaptive run-time management of available resources. One method for supporting adaptively is to implement run-time application mapping. The system may adapt the mapping of the applications in order to accommodate the current workload conditions, to balance the computing load for efficient resource utilization, to meet...

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  • White Papers // Jul 2013

    Analysis of the Impact of Spatial and Temporal Variations on the Stability of SRAM Arrays and the Mitigation Technique Using Independent-Gate Devices

    As planar MOSFET is approaching its physical scaling limits, FinFET becomes one of the most promising alternative structures to keep on the industry scaling-down trend for future technology generations of 22nm and beyond. In this paper, the authors investigate the influence of NBTI degradation induced variation and random process variations...

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  • White Papers // Jul 2013

    A Unified Execution Model for Multiple Computation Models of Streaming Applications on a Composable MPSoC

    In this paper, the authors propose a unified model of execution that aims to fill the abstraction level gap between the primitives of models of computation and the ones of an MPSoC. This paper targets a composable MPSoC platform and supports the sequential, Kahn process networks, and dataflow models. Their...

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  • White Papers // Jul 2013

    Compiling Scilab to High Performance Embedded Multicore Systems

    Efficient, flexible, and high performance chips are needed. Many performance-critical applications (e.g. digital video processing, telecoms, and security applications) that need to process huge amounts of data in a short time would benefit from these attributes. The mapping process of high performance embedded applications to today's Multi-Processor System-on-Chip (MPSoC) devices...

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  • White Papers // Jul 2013

    Efficient Multi-Keyword Ranked Query Over Encrypted Data in Cloud Computing

    Cloud computing infrastructure is a promising new technology and greatly accelerates the development of large scale data storage, processing and distribution. However, security and privacy become major concerns when data owners outsource their private data onto public cloud servers that are not within their trusted management domains. To avoid information...

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  • White Papers // Jul 2013

    An Integrated, Programming Model-Driven Framework for NoC-QoS Support in Cluster-Based Embedded Many-Cores

    Embedded SoC designs are embracing the many-core paradigm to deliver the required performance to run an ever-increasing number of applications in parallel. Networks-on-Chip (NoC) are considered as a convenient technology to implement many-core embedded platforms. The complex and non-uniform nature of the traffic flows generated when multiple parallel applications are...

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  • White Papers // Jul 2013

    Privacy-Preserving Smart Metering with Multiple Data Consumers

    The increasing diffusion of Automatic Meter Reading (AMR) and the possibility to open the system to third party services has raised many concerns about the protection of personal data related to energy, water or gas consumption, from which details about the habits of the users can be inferred. This paper...

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  • White Papers // Jul 2013

    OpenMOLE, a Workflow Engine Specifically Tailored for the Distributed Exploration of Simulation Models

    Complex-systems describe multiple levels of collective structure and organization. In such systems, the emergence of global behavior from local interactions is generally studied through large scale experiments on numerical models. This analysis generates important computation loads which require the use of multi-core servers, clusters or grid computing. Dealing with such...

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  • White Papers // Jun 2013

    Thermal Aware Overall Energy Minimization Scheduling for Hardreal-Time Systems

    As the semiconductor technology proceeds into the deep sub-micron era, the leakage and its dependency with the temperature become critical in dealing with power/energy minimization problems. In this paper, the authors study the problem on how to schedule a hard real-time system to achieve the minimal overall energy, including both...

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  • White Papers // Jun 2013

    Efficient Multicast Schemes for 3-D Networks-on-Chip

    3-D Network-on-Chips (NoCs) have been proposed as a potent solution to address both the interconnection and design complexity problems facing future System-on-Chip (SoC) designs. In this paper, two topology-aware multicast routing algorithms, Multicasting XYZ (MXYZ) and ALternative XYZ (AL + XYZ) algorithms in supporting of 3-D NoC are proposed. In...

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  • White Papers // Jun 2013

    Controlling a Complete Hardware Synthesis Toolchain With LARA Aspects

    The synthesis and mapping of applications to configurable embedded systems is a notoriously complex process. Design-flows typically include tools that have a wide range of parameters which interact in very unpredictable ways, thus creating a large and complex design space. When exploring this space, designers must manage the interfaces between...

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  • White Papers // Jun 2013

    Exploiting Domain Knowledge in System-Level MPSoC Design Space Exploration

    System-level Design Space Exploration (DSE), which is performed early in the design process, is of eminent importance to the design of complex multi-processor embedded multimedia systems. During system-level DSE, system parameters like, e.g., the number and type of processors, and the mapping of application tasks to architectural resources, are considered....

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  • White Papers // Jun 2013

    Limited Carry-In Technique for Real-Time Multi-Core Scheduling

    Schedulability analysis has been widely studied to provide offline timing guarantees for a set of real-time tasks. The so-called limited carry-in technique, which can be orthogonally incorporated into many different multi-core schedulability analysis methods, was originally introduced for Earliest Deadline First (EDF) scheduling to derive a tighter bound on the...

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  • White Papers // Jun 2013

    Energy-Aware Simulation with DVFS

    In recent years, research has been conducted in the area of large systems models, especially distributed systems, to analyze and understand their behavior. Simulators are now commonly used in this area and are becoming more complex. Most of them provide frameworks for simulating application scheduling in various grid infrastructures, others...

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  • White Papers // Jun 2013

    A Novel Batch-Based Group Key Management Protocol Applied to the Internet of Things

    Many applications for ad hoc networks are based on a point-to-multipoint (multicast) communication paradigm, where a single source sends common data to many receivers, or, inversely, on a multipoint-to-point communication paradigm, where multiple sources send data to a single receiver. In such scenarios, communication can be secured by adopting a...

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  • White Papers // Jun 2013

    Avoiding Request - Request Type Message-Dependent Deadlocks in Networks-on-Chips

    When an application is running on a Network-on-Chip (NoC)-based Multi-Processor System-on-Chip (MPSoC), two types of deadlocks may occur: the routing-dependent deadlocks and the message-dependent deadlocks. The former type of deadlocks can be avoided by removing any cyclic paths on the application's channel dependency graph. The message dependent deadlocks, caused by...

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  • White Papers // May 2013

    ARTE: An Application-Specific Run-Time ManagEment Framework for Multi-Cores Based on Queuing Models

    In this paper, the authors present an Application-specific Run-Time managEment (ARTE) framework to tackle the problem of managing computational resources in an application specific multi-core system. The ARTE framework run-time goal is to minimize applications' response times while meeting the applications' computational demands and fitting within the available power budget....

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  • White Papers // May 2013

    Two-Level Caches Tuning Technique for Energy Consumption in Reconfigurable Embedded MPSoC

    In order to meet the ever-increasing computing requirement in the embedded market, multiprocessor chips were proposed as the best way out. In this paper, the authors investigate the energy consumption in these embedded MPSoC systems. One of the efficient solutions to reduce the energy consumption is to reconfigure the cache...

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  • White Papers // May 2013

    Optimizing Two-Dimensional DMA Transfers for Scratchpad Based MPSoCs Platforms

    Reducing the effects of off-chip memory access latency is a key factor in exploiting efficiently embedded multi-core platforms. The authors consider architectures that admit a multi-core computation fabric, having its own fast and small memory to which the data blocks to be processed are fetched from external memory using a...

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  • White Papers // May 2013

    DocCloud: A Document Recommender System on Cloud Computing With Plausible Deniability

    Recommender systems select the most interesting products for costumers based on their interests. The move of a recommender system to a cloud faces many challenges from the perspective of the protection of the participants. Little work has been done regarding secure recommender systems or how to cope with the legal...

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  • White Papers // Apr 2013

    Reducing Cache and TLB Power by Exploiting Memory Region and Privilege Level Semantics

    In the past decade, the general-purpose microprocessor industry has gone through a shift from performance-first to energy-efficient computing. Computer architects invented and investigated methods to optimize power consumption of literally every component of the processor. In contrast with most other units of the chip, the first-level cache in commercial general-purpose...

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  • White Papers // Apr 2007

    A Platform-Based SoC Design and Implementation of Scalable Automaton Matching for Deep Packet Inspection

    String matching plays a central role in packet inspection applications such as intrusion detection, anti-virus, anti-spam and web filtering. Since they are computation and memory intensive, software matching algorithms are insufficient to meet the high-speed performance. Thus, offloading packet inspection to a dedicated hardware seems inevitable. This paper presents a...

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  • White Papers // Feb 2007

    Resource Allocation in Network Processors for Network Intrusion Prevention Systems

    Networking applications with high memory access overhead gradually exploit network processors that feature multiple hardware multithreaded processor cores along with a versatile memory hierarchy. Given rich hardware resources, however, the performance depends on whether those resources are properly allocated. In this paper, the authors develop an NIPS (Network Intrusion Prevention...

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  • White Papers // Feb 2008

    Memory Hierarchy Performance Measurement of Commercial Dual-Core Desktop Processors

    As Chip Multi-Processor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors. In this paper, performance measurement on an Intel Core 2 Duo, an Intel Pentium D and an AMD Athlon 64 2 processor are reported. According to the design specifications, key derivations...

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  • White Papers // Apr 2009

    Sequence-Preserving Parallel IP Lookup Using Multiple SRAM-Based Pipelines

    SRAM (Static Random Access Memory)-based pipelined algorithmic solutions have become competitive alternatives to TCAMs (Ternary Content Addressable Memories) for high-throughput IP lookup. Multiple pipelines can be utilized in parallel to improve the throughput further. However, several challenges must be addressed to make such solutions feasible. The memory distribution over different...

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  • White Papers // Jul 2008

    Implementation and Evaluation of a Microthread Architecture

    Future many-core processor systems require scalable solutions that conventional architectures currently do not provide. This paper presents a novel architecture that demonstrates the required scalability. It is based on a model of computation developed in the AETHER project to provide a safe and composable approach to concurrent programming. The model...

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  • White Papers // Jul 2012

    Adaptive Resource Configuration for Cloud Infrastructure Management

    To guarantee the vision of cloud computing QoS goals between the Cloud provider and the customer have to be dynamically met. This so-called Service Level Agreement (SLA) enactment should involve little human-based interaction in order to guarantee the scalability and efficient resource utilization of the system. To achieve, the author's...

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  • White Papers // Aug 2008

    The Design and Implementation of OGSA-DQP: A Service-Based Distributed Query Processor

    Service-based approaches are rising to prominence because of their potential to meet the requirements for distributed application development in e-business and e-science. The emergence of a service-oriented view of hardware and software resources raises the question as to how database management systems and technologies can best be deployed or adapted...

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  • White Papers // Dec 2008

    A Service-Oriented System for Distributed Data Querying and Integration on Grids

    Data grids rely on the coordinated sharing of and interaction across multiple autonomous database management systems. They provide transparent access to heterogeneous and autonomous data resources stored on grid nodes. Data sharing tools for grids must include both distributed query processing and data integration functionality. This paper presents the implementation...

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  • White Papers // Feb 2006

    Systematic Performance Modeling and Characterization of Heterogeneous IP Networks

    Accurate measurement and modeling of IP networks is essential for network design, planning, and management. Efforts are being made to detect the state of the network from end-to-end measurements using different techniques and paradigms. In this paper, the authors propose a novel concept to use in the modeling of real...

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  • White Papers // Jul 2013

    Privacy-Preserving Smart Metering with Multiple Data Consumers

    The increasing diffusion of Automatic Meter Reading (AMR) and the possibility to open the system to third party services has raised many concerns about the protection of personal data related to energy, water or gas consumption, from which details about the habits of the users can be inferred. This paper...

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  • White Papers // Jun 2013

    Controlling a Complete Hardware Synthesis Toolchain With LARA Aspects

    The synthesis and mapping of applications to configurable embedded systems is a notoriously complex process. Design-flows typically include tools that have a wide range of parameters which interact in very unpredictable ways, thus creating a large and complex design space. When exploring this space, designers must manage the interfaces between...

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  • White Papers // Feb 2013

    Kernel-Assisted and Topology-Aware MPI Collective Communications on Multicore/many-Core Platforms

    Multicore Clusters, which have become the most prominent form of High Performance Computing (HPC) systems, challenge the performance of MPI applications with non-uniform memory accesses and shared cache hierarchies. Recent, advances in MPI collective communications have alleviated the performance issue exposed by deep memory hierarchies by carefully considering the mapping...

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  • White Papers // Nov 2013

    Tibidabo: Making the Case for an ARM-Based HPC System

    It is widely accepted that future HPC systems will be limited by their power consumption. Current HPC systems are built from commodity server processors, designed over years to achieve maximum performance, with energy efficiency being an after-thought. In this paper, the authors advocate a different approach: building HPC systems from...

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  • White Papers // Oct 2010

    On Leakage Power Optimization in Clock Tree Networks for ASICs and General-Purpose Processors

    Leakage power has grown significantly and is a major challenge in SoC design. Among SoC's components, clock distribution network power accounts for a large portion of chip power. This paper proposes to deploy Sleep Transistor Insertion (STI) in the clock tree of data-paths in ASICs or in general-purpose processors in...

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  • White Papers // Nov 2013

    Unified Reliability Estimation and Management of NoC Based Chip Multiprocessors

    The authors present a new architecture level unified reliability evaluation methodology for Chip Multi-Processors (CMPs). The proposed Reliability ESTimation (REST) is based on a Monte Carlo algorithm. What distinguishes REST from the previous work is that both the computational and communication components are considered in a unified manner to compute...

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  • White Papers // Oct 2011

    An Efficient Scheduler of RTOS for Multi/Many-Core System

    Recently, there is a trend to broaden the usage of lower-power embedded media processor core to build the future high-end computing machine or the supercomputer. However the embedded solution also faces the Operating System (OS) design challenge which the thread invoking overhead is higher for fine-grained scientific workload, the message...

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  • White Papers // Jun 2008

    Program Optimization Carving for GPU Computing

    Contemporary many-core processors such as the GeForce 8800 GTX enable application developers to utilize various levels of parallelism to enhance the performance of their applications. However, iterative optimization for such a system may lead to a local performance maximum, due to the complexity of the system. The authors propose program...

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  • White Papers // Nov 2013

    A Two-Phase Design Space Exploration Strategy for System-Level Real-Time Application Mapping Onto MPSoC

    In this paper, the authors present a two-phase Design Space Exploration (DSE) approach to address the problem of real-time application mapping on a flexible MPSoC platform. Their approach is composed of two independent phases - analytical estimation/pruning and system simulation - communicating via a well-defined interface. The strength of the...

    Provided By Reed Business Information

  • White Papers // Aug 2013

    A System-Level Approach to Adaptivity and Fault-Tolerance in NoC-Based MPSoCs: The MADNESS Project

    Modern embedded systems increasingly require adaptive run-time management of available resources. One method for supporting adaptively is to implement run-time application mapping. The system may adapt the mapping of the applications in order to accommodate the current workload conditions, to balance the computing load for efficient resource utilization, to meet...

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  • White Papers // Sep 2011

    A Parallel Formulation for Predictive Control With Nonuniform Hold Constraints

    In this paper the authors investigate the use of parallel computing architectures (multi-core, FPGA and GPU) to solve, at each sampling instant, a constrained optimal control problem. A set of approximated (hence smaller) problems are solved simultaneously and the solution of the one with lower openloop cost is implemented. The...

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  • White Papers // Jun 2008

    Optimizing CAM-Based Instruction Cache Designs for Low-Power Embedded Systems

    Energy consumption and power dissipation are important concerns in the design of embedded systems and they will become even more crucial with finer process geometry, higher frequencies, deeper pipelines and wider issue designs. In particular, the instruction cache consumes more energy than any other processor module, especially with commonly used...

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  • White Papers // Oct 2010

    Parallel 3D Fast Wavelet Transform on Manycore GPUs and Multicore CPUs

    In this paper, different alternatives and programming techniques have been introduced for an efficient parallelization of the 3D fast wavelet transform on multicore CPUs and manycore GPUs. OpenMP and P-threads were used on the CPU to expose task parallelism, whereas CUDA was selected for exploiting data parallelism on the GPU...

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  • White Papers // May 2010

    Exploiting Address Compression and Heterogeneous Interconnects for Efficient Message Management in Tiled CMPs

    High performance processor designs have evolved toward architectures that integrate multiple processing cores on the same chip. As the number of cores inside a Chip Multi-Processor (CMP) increases, the interconnection network will have significant impact on both overall performance and energy consumption as previous studies have shown. Moreover, wires used...

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  • White Papers // Jul 2008

    Two Proposals for the Inclusion of Directory Information in the Last-Level Private Caches of Glueless Shared-Memory Multiprocessors

    In glueless shared-memory multiprocessors where cache coherence is usually maintained using a directory-based protocol, the fast access to the on-chip components contrasts with the much slower main memory. Unfortunately, directory-based protocols need to obtain the sharing status of every memory block before coherence actions can be performed. This information has...

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  • White Papers // Nov 2009

    A Scalable Organization for Distributed Directories

    Although directory-based cache-coherence protocols are the best choice when designing chip multiprocessors with tens of cores on-chip, the memory overhead introduced by the directory structure may not scale gracefully with the number of cores. Many approaches aimed at improving the scalability of directories have been proposed. However, they do not...

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  • White Papers // May 2013

    Two-Level Caches Tuning Technique for Energy Consumption in Reconfigurable Embedded MPSoC

    In order to meet the ever-increasing computing requirement in the embedded market, multiprocessor chips were proposed as the best way out. In this paper, the authors investigate the energy consumption in these embedded MPSoC systems. One of the efficient solutions to reduce the energy consumption is to reconfigure the cache...

    Provided By Reed Business Information

  • White Papers // May 2008

    A Security Approach for Off-chip Memory in Embedded Microprocessor Systems

    In this paper, the authors describes a complete off-chip memory security solution for embedded systems. Their security core is based on a One-Time Pad (OTP) encryption circuit and a CRC-based integrity checking module. These modules safeguard external memory used by embedded processors against a series of well-known attacks, including replay...

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  • White Papers // Jun 2013

    Efficient Multicast Schemes for 3-D Networks-on-Chip

    3-D Network-on-Chips (NoCs) have been proposed as a potent solution to address both the interconnection and design complexity problems facing future System-on-Chip (SoC) designs. In this paper, two topology-aware multicast routing algorithms, Multicasting XYZ (MXYZ) and ALternative XYZ (AL + XYZ) algorithms in supporting of 3-D NoC are proposed. In...

    Provided By Reed Business Information

  • White Papers // Jun 2013

    Avoiding Request - Request Type Message-Dependent Deadlocks in Networks-on-Chips

    When an application is running on a Network-on-Chip (NoC)-based Multi-Processor System-on-Chip (MPSoC), two types of deadlocks may occur: the routing-dependent deadlocks and the message-dependent deadlocks. The former type of deadlocks can be avoided by removing any cyclic paths on the application's channel dependency graph. The message dependent deadlocks, caused by...

    Provided By Reed Business Information

  • White Papers // Jun 2013

    Exploiting Domain Knowledge in System-Level MPSoC Design Space Exploration

    System-level Design Space Exploration (DSE), which is performed early in the design process, is of eminent importance to the design of complex multi-processor embedded multimedia systems. During system-level DSE, system parameters like, e.g., the number and type of processors, and the mapping of application tasks to architectural resources, are considered....

    Provided By Reed Business Information

  • White Papers // Mar 2013

    Scheduling Challenges in Mixed Critical Real-Time Heterogeneous Computing Platforms

    In Dynamic Data-Driven Application Systems (DDDAS), applications must dynamically adapt their behavior in response to objectives and conditions that change while deployed. Often these applications may be safety critical or tightly resource constrained, with a need for graceful degradation when introduced to unexpected conditions. This paper begins by motivating and...

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  • White Papers // Mar 2012

    Improving System Predictability and Performance via Hardware Accelerated Data Structures

    In dynamic data-driven application systems, applications must dynamically adapt their behavior in response to objectives and conditions that change while deployed. One approach to achieve dynamic adaptation is to offer middleware that facilitates component migration between modalities in response to such dynamic changes. The triggering, planning, and cost evaluation of...

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  • White Papers // Jan 2012

    Real-time Simulation of Dynamic Vehicle Models using a High-performance Reconfigurable Platform

    A purely software-based approach for Real-Time Simulation (RTS) may have difficulties in meeting real-time constraints for complex physical model simulations. In this paper, the authors present a methodology for the design and implementation of RTS algorithms, based on the use of Field-Programmable Gate Array (FPGA) technology to improve the response...

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  • White Papers // Nov 2010

    Managing Is Knowing Your People

    Conaty ran HR for GE under Jack Welch. He says Welch knew the top 600 people intimately. He knew their families, their hobbies, their preferences, their strengths and their weaknesses. That is an incredibly high number; but Conaty assures it is accurate and it is that incredible dedication to knowing...

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  • White Papers // Nov 2010

    Sustaining Through Succession

    Management-succession planning requires contemplation of one's own mortality which is unpleasant, leading to many business owners choosing to do very little formal planning when it actually comes to selecting and grooming successors, says Deloitte tax partner, Craig Holland. Executing an effective succession strategy can take, on average, between three and...

    Provided By Reed Business Information

  • White Papers // Jun 2010

    The Returns On Engagement

    Talent management describes a wide range of activities, and not all positive. Most employers have already frozen or restrained hiring and many have downsized their workforce. While both are at times necessary, it is the contention that the largest opportunity for corporate performance improvement lies in engaging the workforce to...

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  • White Papers // May 2009

    Keeping Hold Of Your Best People

    Retaining and engaging high performers is especially important for businesses in tough times. Hay Group's Jane Fraser looks at what organizations can do to retain, engage and enable their best people during these uncertain times The global financial crisis has presented leaders with a challenge some of them have never...

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  • White Papers // Sep 2008

    Secrets Of Senior Management Buy-In

    When considering the implementation of a HR management system, the topic of senior management buy-in often raises its head. This is common not only in situations where a company is changing a software system but also where any fundamental change in company practice is involved. As such, the theories and...

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  • White Papers // Apr 2004

    Drugs And Alcohol: Testing Issues

    There was also a pre-existing policy of having a drug and alcohol-free workplace. John Dawes, project manager health standards for RailCorp says the recent regulation and legislation had been long anticipated. "The legislation means employees can now be tested after they have started work as well, and one can also...

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