Synopsys

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  • White Papers // Jan 2010

    Leveraging Simulation Tools in FPGA Lab Debug

    With increasing design complexity and limited simulation cycles, it becomes necessary to prototype designs. Lab debug tools have traditionally consisted of voltmeters, oscilloscopes and logic analyzers, rendering tools developed specifically for simulation (i.e. waveform viewer scripts, interface assertions, checkers and transaction monitors) unusable. This paper documents how a new generation...

    Provided By Synopsys

  • White Papers // Jan 2010

    Leveraging Simulation Tools in FPGA Lab Debug

    With increasing design complexity and limited simulation cycles, it becomes necessary to prototype designs. Lab debug tools have traditionally consisted of voltmeters, oscilloscopes and logic analyzers, rendering tools developed specifically for simulation (i.e. waveform viewer scripts, interface assertions, checkers and transaction monitors) unusable. This paper documents how a new generation...

    Provided By Synopsys