Technical University of Lodz

Displaying 1-8 of 8 results

  • White Papers // Oct 2013

    Timing Anomalies in Multi-core Architectures due to the Interference on the Shared Resources

    A processor architecture is said to be timing anomalous when a locally favorable event (e.g. cache hit) could result in a globally unfavorable event (e.g. longer execution time) and vice versa. Timing anomalies in single-core processors have been theoretically explained and well understood phenomenon. This paper presents new timing anomalies...

    Provided By Technical University of Lodz

  • White Papers // Aug 2013

    A Resource-Aware Nearest-Neighbor Search Algorithm for K-Dimensional Trees

    K- dimensional tree search is widely used today in computer vision - for example in object recognition to process a large set of features and identify the objects in a scene. However, the search times vary widely based on the size of the data set to be processed, the number...

    Provided By Technical University of Lodz

  • White Papers // May 2013

    Towards Fresh Re-Keying with Leakage-Resilient PRFs: Cipher Design Principles and Analysis

    Leakage-resilient cryptography aims at developing new algorithms for which physical security against side-channel attacks can be formally analyzed. Following the work of Dziembowski and Pietrzak at FOCS 2008, several symmetric cryptographic primitives have been investigated in this setting. Most of them can be instantiated with a block cipher as underlying...

    Provided By Technical University of Lodz

  • White Papers // Apr 2013

    Cache Partitioning and Scheduling for Energy Optimization of Real-Time MPSoCs

    Cache partitioning is a promising technique to reduce energy consumption of the cache subsystem for MPSoCs. Currently, most existing techniques focus primarily on static partition on core level. In this paper, the authors present a task-level approach and show that it outperforms core-level strategies. By taking the interference patterns of...

    Provided By Technical University of Lodz

  • White Papers // Dec 2012

    Challenges of WCET Analysis in COTS Multi-core due to Different Levels of Abstraction

    The continuous demand of producing low cost multi-core hardware for safety critical hard real time applications has driven attempts of using Commercial Off The Shelf (COTS) components. Prior to the industrial deployment, Worst Case Execution Time (WCET) of these applications must be estimated on underlying hardware. However, even simple COTS...

    Provided By Technical University of Lodz

  • White Papers // May 2012

    Vertical Cavity Surface Emitting Laser Transmitters for Energy Efficient Broadband Access Networks

    The use of Vertical Cavity Surface Emitting Lasers (VCSELs) in energy efficient ONUs is critically examined using energy consumption models and numerical analyses of energy savings in sleep and doze mode operations. The implication of polling cycle times and network loads on the resulting energy savings and upstream utilization is...

    Provided By Technical University of Lodz

  • White Papers // Aug 2011

    Capacity Planning for Virtualized Servers

    Today's data centers offer many different IT services mostly hosted on dedicated physical servers. Virtualization provides a technical means for server consolidation leading to increased server utilization. The term refers to the abstraction of computing resources across many aspects of computing and has been used to describe different techniques. Virtualization...

    Provided By Technical University of Lodz

  • White Papers // May 2011

    Towards Learning Business Process Management Thinking

    Business process management is indisputable an approach many organizations are aiming to adopt. While much emphasis is put on modeling business processes and designing information systems, the employees working in a process-oriented organization often struggle with these changes. Here, it is of major importance for organizations to take their employees...

    Provided By Technical University of Lodz

  • White Papers // May 2013

    Towards Fresh Re-Keying with Leakage-Resilient PRFs: Cipher Design Principles and Analysis

    Leakage-resilient cryptography aims at developing new algorithms for which physical security against side-channel attacks can be formally analyzed. Following the work of Dziembowski and Pietrzak at FOCS 2008, several symmetric cryptographic primitives have been investigated in this setting. Most of them can be instantiated with a block cipher as underlying...

    Provided By Technical University of Lodz

  • White Papers // May 2012

    Vertical Cavity Surface Emitting Laser Transmitters for Energy Efficient Broadband Access Networks

    The use of Vertical Cavity Surface Emitting Lasers (VCSELs) in energy efficient ONUs is critically examined using energy consumption models and numerical analyses of energy savings in sleep and doze mode operations. The implication of polling cycle times and network loads on the resulting energy savings and upstream utilization is...

    Provided By Technical University of Lodz

  • White Papers // Aug 2013

    A Resource-Aware Nearest-Neighbor Search Algorithm for K-Dimensional Trees

    K- dimensional tree search is widely used today in computer vision - for example in object recognition to process a large set of features and identify the objects in a scene. However, the search times vary widely based on the size of the data set to be processed, the number...

    Provided By Technical University of Lodz

  • White Papers // May 2011

    Towards Learning Business Process Management Thinking

    Business process management is indisputable an approach many organizations are aiming to adopt. While much emphasis is put on modeling business processes and designing information systems, the employees working in a process-oriented organization often struggle with these changes. Here, it is of major importance for organizations to take their employees...

    Provided By Technical University of Lodz

  • White Papers // Dec 2012

    Challenges of WCET Analysis in COTS Multi-core due to Different Levels of Abstraction

    The continuous demand of producing low cost multi-core hardware for safety critical hard real time applications has driven attempts of using Commercial Off The Shelf (COTS) components. Prior to the industrial deployment, Worst Case Execution Time (WCET) of these applications must be estimated on underlying hardware. However, even simple COTS...

    Provided By Technical University of Lodz

  • White Papers // Oct 2013

    Timing Anomalies in Multi-core Architectures due to the Interference on the Shared Resources

    A processor architecture is said to be timing anomalous when a locally favorable event (e.g. cache hit) could result in a globally unfavorable event (e.g. longer execution time) and vice versa. Timing anomalies in single-core processors have been theoretically explained and well understood phenomenon. This paper presents new timing anomalies...

    Provided By Technical University of Lodz

  • White Papers // Apr 2013

    Cache Partitioning and Scheduling for Energy Optimization of Real-Time MPSoCs

    Cache partitioning is a promising technique to reduce energy consumption of the cache subsystem for MPSoCs. Currently, most existing techniques focus primarily on static partition on core level. In this paper, the authors present a task-level approach and show that it outperforms core-level strategies. By taking the interference patterns of...

    Provided By Technical University of Lodz

  • White Papers // Aug 2011

    Capacity Planning for Virtualized Servers

    Today's data centers offer many different IT services mostly hosted on dedicated physical servers. Virtualization provides a technical means for server consolidation leading to increased server utilization. The term refers to the abstraction of computing resources across many aspects of computing and has been used to describe different techniques. Virtualization...

    Provided By Technical University of Lodz