Technimo LLC

Displaying 1-25 of 25 results

  • White Papers // Nov 2013

    Associative Processor Thermally Enables 3-D Integration of Processing and Memory

    Machine learning, data mining, network routing, search engines, and other big data applications can be significantly sped up by massively parallel machines, such as GPUs. 3-D integration of conventional massively parallel processors is challenging due to high temperatures and hotspots. An Associative Processor (AP) is a viable candidate for such...

    Provided By Technimo LLC

  • White Papers // Nov 2013

    Ginseng: Market-Driven Memory Allocation

    Infrastructure-as-a-Service (IaaS) cloud computing providers rent computing resources to their clients. As competition between providers gets tougher and prices decrease, providers will need to continuously and ruthlessly reduce expenses, primarily by improving their hardware utilization. Physical memory is the most constrained and thus precious re-source in use in cloud computing...

    Provided By Technimo LLC

  • White Papers // Jun 2013

    On the Corner Points of the Capacity Region of a Gaussian Interference Channel

    This paper is to explore the situation where one transmitter sends its information at the maximal achievable rate for a single-user (without interference), and the second transmitter needs to keep its data rate below a certain value in order to achieve reliable communication for the two non-cooperating receivers. The analysis...

    Provided By Technimo LLC

  • White Papers // May 2013

    Compression for Fixed-Width Memories

    To enable direct access to a memory word based on its index, memories make use of fixed-width arrays, in which a fixed number of bits is allocated for the representation of each data entry. In this paper, the authors consider the problem of encoding data entries of two fields, drawn...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    On Finding an Optimal TCAM Encoding Scheme for Packet Classification

    Hardware-based packet classification has become an essential component in many networking devices. It often relies on TCAMs (ternary content-addressable memories), which need to compare the packet header against a set of rules. But efficiently encoding these rules is not an easy task. In particular, the most complicated rules are range...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    Compressing Forwarding Tables

    With the rise of datacenter virtualization, the number of entries in forwarding tables is expected to scale from several thousands to several millions. Unfortunately, such forwarding table sizes can hardly be implemented today in on-chip memory. In this paper, the authors investigate the compressibility of forwarding tables. They first introduce...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    Palette: Distributing Tables in Software-Defined Networks

    In Software-Defined Networks (SDNs), the network controller first formulates abstract network-wide policies, and then implements them in the forwarding tables of network switches. However, fast SDN tables often cannot scale beyond a few hundred entries. This is because they typically include wildcards, and therefore are implemented using either expensive or...

    Provided By Technimo LLC

  • White Papers // Nov 2012

    The Switch Reordering Contagion: Preventing a Few Late Packets from Ruining the Whole Party

    Packet reordering has now become one of the most significant bottlenecks in next-generation switch designs. A switch practically experiences a reordering delay contagion, such that a few late packets may affect a disproportionate number of other packets. This contagion can have two possible forms. First, since switch designers tend to...

    Provided By Technimo LLC

  • White Papers // Oct 2012

    On the Capacity of Bufferless Networks-on-Chip

    Networks-on-Chip (NoCs) form an emerging paradigm for communications within chips. In particular, bufferless NoCs require significantly less area and power consumption, but also pose novel major scheduling problems to achieve full capacity. In this paper, the authors provide first insights on the capacity of bufferless NoCs. In particular, they present...

    Provided By Technimo LLC

  • White Papers // Aug 2012

    Maximizing the Throughput of Cuckoo Hashing in Network Devices

    Hash tables form a core component of network devices. Because of their large size, they are implemented using both fast on-chip SRAM and slow off-chip DRAM. However, this makes their implementation particularly delicate, as a suboptimal choice of the hashing scheme parameters may result in a higher average query time...

    Provided By Technimo LLC

  • White Papers // Aug 2012

    Capacity-Achieving Polar Codes for Arbitrarily-Permuted Parallel Channels

    Parallel channels are used to serve as a model for a time-varying communication channel. In this paper, each one of the parallel channels corresponds to a possible state of the time-varying channel, and the communication takes place over one of these parallel channels according to the instantaneous state of the...

    Provided By Technimo LLC

  • White Papers // Jul 2012

    A Switch-Based Approach to Throughput Collapse and Starvation in Data Centers

    Data center switches need to satisfy stringent low-delay and high-capacity requirements. To do so, they rely on small switch buffers. However, in case of congestion, data center switches may suffer from throughput collapse for short TCP flows as well as temporary starvation for long TCP flows. In this paper, the...

    Provided By Technimo LLC

  • White Papers // Jul 2012

    The Projected TAR and its Application to Conformance Checking

    Relational semantics of business process models have seen an uptake in various fields of application. As a prominent example, the Transition Adjacency Relation (TAR) has been used, for instance, to conduct conformance checking and similarity assessment. TAR is defined over the complete set of transitions of a Petri net and...

    Provided By Technimo LLC

  • White Papers // May 2012

    Reducing the Reordering Delay in Multi-Core Network Processors

    Today, designers of network processors often strive to keep the packet reception and transmission orders identical, and therefore avoid any possible out-of-order transmission. However, the development of new features in advanced network processors has resulted in increasingly parallel architectures and increasingly heterogeneous packet processing times. As a result, packets with...

    Provided By Technimo LLC

  • White Papers // Feb 2012

    Exact Worst-Case TCAM Rule Expansion

    In recent years, hardware-based packet classification has became an essential component in many networking devices. It often relies on Ternary Content-Addressable Memories (TCAMs), which can compare in parallel the packet header against a large set of rules. Designers of TCAMs often have to deal with unpredictable sets of rules. These...

    Provided By Technimo LLC

  • White Papers // Feb 2012

    Providing Performance Guarantees in Multipass Network Processors

    Current Network Processors (NPs) increasingly deal with packets with heterogeneous processing times. In such an environment, packets that require many processing cycles delay low latency traffic, because the common approach in today's NPs is to employ run-to-completion processing. These difficulties have led to the emergence of the multipass NP architecture,...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    The Bloom Paradox: When not to Use a Bloom Filter?

    In this paper, the authors uncover the Bloom paradox in Bloom filters: sometimes, it is better to disregard the query results of Bloom filters, and in fact not to even query them, thus making them useless. They first analyze conditions under which the Bloom paradox occurs in a Bloom filter,...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    The Variable-Increment Counting Bloom Filter

    Counting Bloom Filters (CBFs) are widely used in networking device algorithms. They implement fast set representations to support membership queries with limited error, and support element deletions unlike Bloom Filters. However, they consume significant amounts of memory. In this paper, the authors introduce a new general method based on variable...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    Estimators Also Need Shared Values to Grow Together

    Network management applications require large numbers of counters in order to collect traffic characteristics for each network flow. However, these counters often barely fit into on-chip SRAM memories. Past papers have proposed using counter estimators instead, thus trading off counter precision for a lower number of bits. But these estimators...

    Provided By Technimo LLC

  • White Papers // Oct 2011

    Action Patterns in Business Process Model Repositories

    Business process models are extensively used in companies to document and improve business operations. In essence, there are two major challenges. The increasing number of staff with little modeling expertise involved in model design requires new concepts for quality assurance. Moreover, the huge number of process models typically maintained in...

    Provided By Technimo LLC

  • White Papers // Aug 2011

    Maximum Bipartite Matching Size and Application to Cuckoo Hashing

    Cuckoo hashing with a stash is a robust multiple choice hashing scheme with high memory utilization that can be used in many network device applications. Unfortunately, for memory loads beyond 0.5, little is known on its performance. In this paper, the authors analyze its average performance over such loads. They...

    Provided By Technimo LLC

  • White Papers // Jun 2010

    Worst-Case TCAM Rule Expansion

    Designers of TCAMs (Ternary CAMs) for packet classification deal with unpredictable sets of rules, resulting in highly variable rule expansions, and rely on heuristic encoding algorithms with no reasonable expansion guarantees. In this paper, given several types of rules, the authors provide new upper bounds on the TCAM worst-case rule...

    Provided By Technimo LLC

  • White Papers // Apr 2010

    On the Code Length of TCAM Coding Schemes

    All high-speed Internet devices need to implement classification, i.e. they must determine whether incoming packet headers belong to a given subset of a search space. To do it, they encode the subset using ternary arrays in special high-speed devices called TCAMs (ternary content-addressable memories). However, the optimal coding for arbitrary...

    Provided By Technimo LLC

  • White Papers // Sep 2009

    Energy-Constrained Balancing

    In this paper, the authors define and analyze a fundamental energy-constrained balancing problem, in which elements need to be balanced across resources in order to minimize the increasing convex cost function associated with the load at each resource. However, the balancing operation needs to satisfy average and instantaneous constraints on...

    Provided By Technimo LLC

  • White Papers // Feb 2009

    Bounds on the Number of Iterations for Turbo-Like Ensembles over the Binary Erasure Channel

    In this paper, the authors provide simple lower bounds on the number of iterations which is required for successful message-passing decoding of some important families of graph-based code ensembles (including low-density parity-check codes and variations of repeat-accumulate codes). The transmission of the code ensembles is assumed to take place over...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    On Finding an Optimal TCAM Encoding Scheme for Packet Classification

    Hardware-based packet classification has become an essential component in many networking devices. It often relies on TCAMs (ternary content-addressable memories), which need to compare the packet header against a set of rules. But efficiently encoding these rules is not an easy task. In particular, the most complicated rules are range...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    Compressing Forwarding Tables

    With the rise of datacenter virtualization, the number of entries in forwarding tables is expected to scale from several thousands to several millions. Unfortunately, such forwarding table sizes can hardly be implemented today in on-chip memory. In this paper, the authors investigate the compressibility of forwarding tables. They first introduce...

    Provided By Technimo LLC

  • White Papers // May 2013

    Compression for Fixed-Width Memories

    To enable direct access to a memory word based on its index, memories make use of fixed-width arrays, in which a fixed number of bits is allocated for the representation of each data entry. In this paper, the authors consider the problem of encoding data entries of two fields, drawn...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    The Bloom Paradox: When not to Use a Bloom Filter?

    In this paper, the authors uncover the Bloom paradox in Bloom filters: sometimes, it is better to disregard the query results of Bloom filters, and in fact not to even query them, thus making them useless. They first analyze conditions under which the Bloom paradox occurs in a Bloom filter,...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    The Variable-Increment Counting Bloom Filter

    Counting Bloom Filters (CBFs) are widely used in networking device algorithms. They implement fast set representations to support membership queries with limited error, and support element deletions unlike Bloom Filters. However, they consume significant amounts of memory. In this paper, the authors introduce a new general method based on variable...

    Provided By Technimo LLC

  • White Papers // Apr 2010

    On the Code Length of TCAM Coding Schemes

    All high-speed Internet devices need to implement classification, i.e. they must determine whether incoming packet headers belong to a given subset of a search space. To do it, they encode the subset using ternary arrays in special high-speed devices called TCAMs (ternary content-addressable memories). However, the optimal coding for arbitrary...

    Provided By Technimo LLC

  • White Papers // Jun 2010

    Worst-Case TCAM Rule Expansion

    Designers of TCAMs (Ternary CAMs) for packet classification deal with unpredictable sets of rules, resulting in highly variable rule expansions, and rely on heuristic encoding algorithms with no reasonable expansion guarantees. In this paper, given several types of rules, the authors provide new upper bounds on the TCAM worst-case rule...

    Provided By Technimo LLC

  • White Papers // Nov 2012

    The Switch Reordering Contagion: Preventing a Few Late Packets from Ruining the Whole Party

    Packet reordering has now become one of the most significant bottlenecks in next-generation switch designs. A switch practically experiences a reordering delay contagion, such that a few late packets may affect a disproportionate number of other packets. This contagion can have two possible forms. First, since switch designers tend to...

    Provided By Technimo LLC

  • White Papers // Feb 2012

    Exact Worst-Case TCAM Rule Expansion

    In recent years, hardware-based packet classification has became an essential component in many networking devices. It often relies on Ternary Content-Addressable Memories (TCAMs), which can compare in parallel the packet header against a large set of rules. Designers of TCAMs often have to deal with unpredictable sets of rules. These...

    Provided By Technimo LLC

  • White Papers // Aug 2012

    Capacity-Achieving Polar Codes for Arbitrarily-Permuted Parallel Channels

    Parallel channels are used to serve as a model for a time-varying communication channel. In this paper, each one of the parallel channels corresponds to a possible state of the time-varying channel, and the communication takes place over one of these parallel channels according to the instantaneous state of the...

    Provided By Technimo LLC

  • White Papers // Feb 2009

    Bounds on the Number of Iterations for Turbo-Like Ensembles over the Binary Erasure Channel

    In this paper, the authors provide simple lower bounds on the number of iterations which is required for successful message-passing decoding of some important families of graph-based code ensembles (including low-density parity-check codes and variations of repeat-accumulate codes). The transmission of the code ensembles is assumed to take place over...

    Provided By Technimo LLC

  • White Papers // Jan 2013

    Palette: Distributing Tables in Software-Defined Networks

    In Software-Defined Networks (SDNs), the network controller first formulates abstract network-wide policies, and then implements them in the forwarding tables of network switches. However, fast SDN tables often cannot scale beyond a few hundred entries. This is because they typically include wildcards, and therefore are implemented using either expensive or...

    Provided By Technimo LLC

  • White Papers // Oct 2012

    On the Capacity of Bufferless Networks-on-Chip

    Networks-on-Chip (NoCs) form an emerging paradigm for communications within chips. In particular, bufferless NoCs require significantly less area and power consumption, but also pose novel major scheduling problems to achieve full capacity. In this paper, the authors provide first insights on the capacity of bufferless NoCs. In particular, they present...

    Provided By Technimo LLC

  • White Papers // Aug 2012

    Maximizing the Throughput of Cuckoo Hashing in Network Devices

    Hash tables form a core component of network devices. Because of their large size, they are implemented using both fast on-chip SRAM and slow off-chip DRAM. However, this makes their implementation particularly delicate, as a suboptimal choice of the hashing scheme parameters may result in a higher average query time...

    Provided By Technimo LLC

  • White Papers // May 2012

    Reducing the Reordering Delay in Multi-Core Network Processors

    Today, designers of network processors often strive to keep the packet reception and transmission orders identical, and therefore avoid any possible out-of-order transmission. However, the development of new features in advanced network processors has resulted in increasingly parallel architectures and increasingly heterogeneous packet processing times. As a result, packets with...

    Provided By Technimo LLC

  • White Papers // Jul 2012

    A Switch-Based Approach to Throughput Collapse and Starvation in Data Centers

    Data center switches need to satisfy stringent low-delay and high-capacity requirements. To do so, they rely on small switch buffers. However, in case of congestion, data center switches may suffer from throughput collapse for short TCP flows as well as temporary starvation for long TCP flows. In this paper, the...

    Provided By Technimo LLC

  • White Papers // Feb 2012

    Providing Performance Guarantees in Multipass Network Processors

    Current Network Processors (NPs) increasingly deal with packets with heterogeneous processing times. In such an environment, packets that require many processing cycles delay low latency traffic, because the common approach in today's NPs is to employ run-to-completion processing. These difficulties have led to the emergence of the multipass NP architecture,...

    Provided By Technimo LLC

  • White Papers // Jan 2012

    Estimators Also Need Shared Values to Grow Together

    Network management applications require large numbers of counters in order to collect traffic characteristics for each network flow. However, these counters often barely fit into on-chip SRAM memories. Past papers have proposed using counter estimators instead, thus trading off counter precision for a lower number of bits. But these estimators...

    Provided By Technimo LLC

  • White Papers // Aug 2011

    Maximum Bipartite Matching Size and Application to Cuckoo Hashing

    Cuckoo hashing with a stash is a robust multiple choice hashing scheme with high memory utilization that can be used in many network device applications. Unfortunately, for memory loads beyond 0.5, little is known on its performance. In this paper, the authors analyze its average performance over such loads. They...

    Provided By Technimo LLC

  • White Papers // Sep 2009

    Energy-Constrained Balancing

    In this paper, the authors define and analyze a fundamental energy-constrained balancing problem, in which elements need to be balanced across resources in order to minimize the increasing convex cost function associated with the load at each resource. However, the balancing operation needs to satisfy average and instantaneous constraints on...

    Provided By Technimo LLC

  • White Papers // Jun 2013

    On the Corner Points of the Capacity Region of a Gaussian Interference Channel

    This paper is to explore the situation where one transmitter sends its information at the maximal achievable rate for a single-user (without interference), and the second transmitter needs to keep its data rate below a certain value in order to achieve reliable communication for the two non-cooperating receivers. The analysis...

    Provided By Technimo LLC

  • White Papers // Oct 2011

    Action Patterns in Business Process Model Repositories

    Business process models are extensively used in companies to document and improve business operations. In essence, there are two major challenges. The increasing number of staff with little modeling expertise involved in model design requires new concepts for quality assurance. Moreover, the huge number of process models typically maintained in...

    Provided By Technimo LLC

  • White Papers // Jul 2012

    The Projected TAR and its Application to Conformance Checking

    Relational semantics of business process models have seen an uptake in various fields of application. As a prominent example, the Transition Adjacency Relation (TAR) has been used, for instance, to conduct conformance checking and similarity assessment. TAR is defined over the complete set of transitions of a Petri net and...

    Provided By Technimo LLC

  • White Papers // Nov 2013

    Ginseng: Market-Driven Memory Allocation

    Infrastructure-as-a-Service (IaaS) cloud computing providers rent computing resources to their clients. As competition between providers gets tougher and prices decrease, providers will need to continuously and ruthlessly reduce expenses, primarily by improving their hardware utilization. Physical memory is the most constrained and thus precious re-source in use in cloud computing...

    Provided By Technimo LLC

  • White Papers // Nov 2013

    Associative Processor Thermally Enables 3-D Integration of Processing and Memory

    Machine learning, data mining, network routing, search engines, and other big data applications can be significantly sped up by massively parallel machines, such as GPUs. 3-D integration of conventional massively parallel processors is challenging due to high temperatures and hotspots. An Associative Processor (AP) is a viable candidate for such...

    Provided By Technimo LLC