Universidad de Malaga

Displaying 1-34 of 34 results

  • White Papers // Jan 2014

    Validating a Token Coherence Protocol for Scientific Workloads

    Token coherence provides a flexible framework for designing new coherence protocols which decouples performance from correctness, easing the design of efficient coherence protocols. In this paper, the authors have implemented a coherence protocol for a cc-NUMA architecture based on TokenB using the RSIM performance simulator to validate previous claims about...

    Provided By Universidad de Malaga

  • White Papers // Jan 2014

    Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors

    Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed on every cache miss before any coherence action can be performed. In this paper, the authors present a new protocol that moves the role of...

    Provided By Universidad de Malaga

  • White Papers // Jan 2014

    A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors

    There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to the indirection introduced by the accesses to directory information, usually stored in main memory. In this paper, the authors present a lightweight directory architecture aimed...

    Provided By Universidad de Malaga

  • White Papers // Jul 2013

    Temporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors

    Most of the data referenced by sequential and parallel applications running in current chip multiprocessors are referenced by only one thread and can be considered as private data. A lot of recent proposals leverage this observation to improve many aspects of chip multiprocessors, such as reducing coherence overhead or the...

    Provided By Universidad de Malaga

  • White Papers // May 2013

    Cloud Computing Services Potential Analysis: An Integrated Model for Evaluating Software as a Service

    This paper address, in a practical and integrated model, a possible solution of issues concerning the Software as a Service (SaaS) introduction and evaluation. A selective top-down analysis is proposed to guide the overall assessment. The construction of the Potential Adoption Index (PAI), in the last stage of the process,...

    Provided By Universidad de Malaga

  • White Papers // Sep 2012

    Using Heterogeneous Networks to Improve Energy Efficiency in Direct Coherence Protocols for Many-Core CMPs

    Direct coherence protocols have been recently proposed as an alternative to directory-based protocols to keep cache coherence in many-core CMPs. Differently from directory-based protocols, in direct coherence the responsible for providing the requested data in case of a cache miss is also tasked with keeping the updated directory information and...

    Provided By Universidad de Malaga

  • White Papers // May 2012

    Interactive Specification and Verification of Behavioral Adaptation Contracts

    Services can be accessed and used to fulfill basic requirements, or can be composed with other services in order to build bigger systems which aim at working out complex tasks. These services must be equipped with rich interfaces to ease their reuse and enable their automatic composition. The authors can...

    Provided By Universidad de Malaga

  • White Papers // Apr 2012

    Cache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems

    There is a growing trend towards developing large-scale cache-coherent systems by using commodity symmetric multiprocessors, which requires to extend their coherence protocol. In such systems, cache coherence transactions issued due to cache misses traverse interconnection networks with very different topologies and latencies. In this paper, the authors perform a cache...

    Provided By Universidad de Malaga

  • White Papers // Aug 2011

    Survey on Opportunistic Routing in Multihop Wireless Networks

    Opportunistic routing is based on the use of broadcast transmissions to expand the potential forwarders that can assist in the retransmission of the data packets. The receptors need to be coordinated in order to avoid duplicated transmissions. This is usually achieved by ordering the forwarding nodes according to some criteria....

    Provided By Universidad de Malaga

  • White Papers // Jun 2011

    Energy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation

    As the number of cores in a chip increases, power consumption is becoming a major constraint in the design of chip multiprocessors. At the same time, server consolidation is gaining importance to take advantage of such a number of cores. Their goal is to alleviate this constraint by reducing the...

    Provided By Universidad de Malaga

  • White Papers // May 2011

    Self-Related Traces: An Alternative to Full-System Simulation for NoCs

    The Network-on-Chip (NoC) has become an integral part of multicore systems and Multi-Processor System-on-Chips (MPSoCs). Detailed simulation models are one of the most common techniques to evaluate the performance of a NoC. Most of these models only include a subset of the complete architecture and use only synthetic traffic. However,...

    Provided By Universidad de Malaga

  • White Papers // Apr 2011

    A Cluster-Based Quantitative Reliability Model

    It is well known that wireless sensor and actor networks are error-prone as multi-hop communications are carried out. Furthermore, the further the distance between two nodes is, the less the communication reliability is. Despite the fact that this issue has been studied in many publications, there are new publications still...

    Provided By Universidad de Malaga

  • White Papers // Jan 2011

    EMC2: Extending Magny-Cours Coherence for Large-Scale Servers

    The demand of larger and more powerful high-performance shared-memory servers is growing over the last few years. To meet this need, AMD has recently launched the twelve-core Magny-Cours processors. They include a directory cache (Probe Filter) that increases the scalability of the coherence protocol applied by Opterons, based on coherent...

    Provided By Universidad de Malaga

  • White Papers // Nov 2010

    YeastMed: An XML-Based System for Biological Data Integration of Yeast

    A key goal of bioinformatics is to create database systems and software platforms capable of storing and analysing large sets of biological data. Hundreds of biological databases are now available and provide access to huge amount of biological data. SGD, Yeastract, CYGD-MIPS, BioGrid and PhosphoGrid are five of the most...

    Provided By Universidad de Malaga

  • White Papers // Oct 2010

    Correlation Between Static Measures and Code Coverage in Evolutionary Test Data Generation

    Evolutionary testing is a very popular domain in the field of search based software engineering that consists in automatically generating test data for a given piece of code using evolutionary algorithms. One of the most important measures used to evaluate the quality of the generated test suites is code coverage....

    Provided By Universidad de Malaga

  • White Papers // Aug 2010

    Analysis of the Tradeoff Between Delay and Source Rate in Multiuser Wireless Systems

    Providing Quality of Service (QoS) guarantees to different applications is an important issue in the design of next generation of high-speed networks. The QoS metrics of interest are likely to vary from one application to another, but are predicted to include measures such as throughput, Bit Error Rate (BER), and...

    Provided By Universidad de Malaga

  • White Papers // Jul 2010

    Low-Overhead Organizations for the Directory in Future Many-Core CMPs

    If current trends continue, today's small-scale general-purpose CMPs will soon be replaced by multi-core architectures integrating tens or even hundreds of cores on-chip. These many-core CMPs will implement the hardware-managed, implicitly-addressed, coherent caches memory model. Cache coherence in these designs will be maintained through a directory-based cache coherence protocol implemented...

    Provided By Universidad de Malaga

  • White Papers // Jun 2010

    QoSModeling for End-to-End Performance Evaluation Over Networks With Wireless Access

    This paper presents an end-to-end Quality of Service (QoS) model for assessing the performance of data services over networks with wireless access. The proposed model deals with performance degradation across protocol layers using a bottom-up strategy, starting with the physical layer and moving on up to the application layer. This...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    A Novel Hardware-Based Barrier Synchronization for Many-Core CMPs

    In this paper, the authors have presented a novel hardware-based barrier mechanism for many-core CMPs. Their architecture has not any influence on the conventional memory system to conduct the synchronization: no shared variables, no coherence traffic and no traffic across the interconnection network. Instead, it relies on one-bit messages across...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    ITIO - Semantic Business Processes Based on Software-as-a-Service and Cloud Computing

    Recently, the economy has taken a downturn, which has forced many companies to reduce their costs in IT. According to experts, one interesting approach could be to outsource parts of their business through third parties. This will allow companies to free resources invested in outsourced business processes and to focus...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    Imperfect Adaptation in Next Generation OFDMA Cellular Systems

    Most cellular standards for the forthcoming Beyond 3G (B3G) and 4G technologies state Orthogonal Frequency-Division Multiple Access (OFDMA) as the preferred multiplexing technique. OFDMA combines an efficient multiple access with Adaptive Quadrature Amplitude Modulation (AQAM) to maximize system performance while keeping the errors below a certain target. In order to...

    Provided By Universidad de Malaga

  • White Papers // Oct 2009

    Distortion Evaluation of DMT Signals on Indoor Broadband Power-Line Channels

    Indoor power-line channels are frequency and time selective. At this moment, the distortion suffered by DMT signals when traversing these channels must be accomplished by means of computationally intensive simulations, since no consensus on a statistical channel model has been reached yet. This paper proposes a simpler method to compute...

    Provided By Universidad de Malaga

  • White Papers // May 2009

    REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs

    The processors are becoming more susceptible to transient faults due to several factors such as technology scaling, voltage reduction, temperature fluctuations, process variation or signal cross-talking. Although there are many approaches exploring reliability for single-threaded applications, shared-memory environments have not been thoroughly studied. In this paper, the authors first study...

    Provided By Universidad de Malaga

  • White Papers // Apr 2009

    Programming Wireless Sensor Networks Applications Using SMEPP: A Case Study

    The SMEPP middleware is a secure and generic middleware, based on a new network centric abstract model for Embedded Peer-To-Peer (EP2P) systems based on services with security as a main design issue. It has an adaptable architecture which can be used in different devices ranging from standard PCs to motes....

    Provided By Universidad de Malaga

  • White Papers // Feb 2009

    Speculation-Based Conflict Resolution in Hardware Transactional Memory

    Conflict management is a key design dimension of Hardware Transactional Memory (HTM) systems, and the implementation of efficient mechanisms for detection and resolution becomes critical when conflicts are not a rare event. Current designs address this problem from two opposite perspectives, namely, lazy and eager schemes. While the former approach...

    Provided By Universidad de Malaga

  • White Papers // Feb 2009

    ITACA: An Integrated Toolbox for the Automatic Composition and Adaptation of Web Services

    Adaptation is of utmost importance in systems developed by assembling reusable software services accessed through their public interfaces. This process aims at solving, as automatically as possible, mismatch cases which may be given at the different interoperability levels among interfaces by synthesizing a mediating adaptor. In this paper, the authors...

    Provided By Universidad de Malaga

  • White Papers // Aug 2008

    Directory-Based Conflict Detection in Hardware Transactional Memory

    One of the key design points of any Hardware Transactional Memory (HTM) system is the conflict detection mechanism, and its efficient implementation becomes critical when conflicts are not a rare event. While many contemporary proposals rely on the coherence protocol to carry out conflict detection at the private cache levels,...

    Provided By Universidad de Malaga

  • White Papers // Jul 2008

    Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs

    One way of dealing with transient faults that will affect the interconnection network of future large-scale Chip Multi-Processor (CMP) systems is by extending the cache coherence protocol. Fault tolerance at the level of the cache coherence protocol has been proven to achieve very low performance overhead in absence of faults...

    Provided By Universidad de Malaga

  • White Papers // May 2008

    Evaluating Dynamic Core Coupling in a Scalable Tiled-CMP Architecture

    To obtain benefit of the increasing transistor count in current processors, designs are leading to Chip Multi-Processors (CMPs) that will integrate tens or hundreds of processor cores on-chip. However, scaling and voltage factors are increasing susceptibility of architectures to transient, intermittent and permanent faults, as well as process variations. A...

    Provided By Universidad de Malaga

  • White Papers // Apr 2008

    DiCo-CMP: Efficient Cache Coherency in Tiled CMP Architectures

    Future CMP designs that will integrate tens of processor cores on-chip will be constrained by area and power. Area constraints make impractical the use of a bus or a crossbar as the on-chip interconnection network, and tiled CMPs organized around a direct interconnection network will probably be the architecture of...

    Provided By Universidad de Malaga

  • White Papers // Mar 2008

    A Fault-Tolerant Directory-Based Cache Coherence Protocol for CMP Architectures

    Current technology trends of increased scale of integration are pushing CMOS technology into the deep-submicron domain, enabling the creation of chips with a significantly greater number of transistors but also more prone to transient failures. Hence, computer architects will have to consider reliability as a prime concern for future Chip...

    Provided By Universidad de Malaga

  • White Papers // Feb 2008

    Achieving Predictable and Scalable Performance with BCS-MPI

    Demand for increasingly-higher computing capability is driving a similar growth in compute cluster sizes, soon to be reaching tens of thousands of processors. This growth is not matched however by system software, which has remained largely unchanged from the advent of clusters. The failure of system software to scale and...

    Provided By Universidad de Malaga

  • White Papers // Mar 2007

    Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures

    Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip Multi-Processors (CMPs) constitute the architecture of choice in the high performance embedded domain for several reasons such as better levels of scalability and performance/energy ratio. On...

    Provided By Universidad de Malaga

  • White Papers // Apr 2006

    Effects of Working Capital Management on SME Profitability

    The corporate finance literature has traditionally focused on the study of long-term financial decisions. Researchers have particularly offered studies analyzing investments, capital structure, dividends or company valuation, among other topics. But the investment that firms make in short-term assets, and the resources used with maturities of under one year, represent...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    Imperfect Adaptation in Next Generation OFDMA Cellular Systems

    Most cellular standards for the forthcoming Beyond 3G (B3G) and 4G technologies state Orthogonal Frequency-Division Multiple Access (OFDMA) as the preferred multiplexing technique. OFDMA combines an efficient multiple access with Adaptive Quadrature Amplitude Modulation (AQAM) to maximize system performance while keeping the errors below a certain target. In order to...

    Provided By Universidad de Malaga

  • White Papers // Aug 2011

    Survey on Opportunistic Routing in Multihop Wireless Networks

    Opportunistic routing is based on the use of broadcast transmissions to expand the potential forwarders that can assist in the retransmission of the data packets. The receptors need to be coordinated in order to avoid duplicated transmissions. This is usually achieved by ordering the forwarding nodes according to some criteria....

    Provided By Universidad de Malaga

  • White Papers // Aug 2010

    Analysis of the Tradeoff Between Delay and Source Rate in Multiuser Wireless Systems

    Providing Quality of Service (QoS) guarantees to different applications is an important issue in the design of next generation of high-speed networks. The QoS metrics of interest are likely to vary from one application to another, but are predicted to include measures such as throughput, Bit Error Rate (BER), and...

    Provided By Universidad de Malaga

  • White Papers // Apr 2011

    A Cluster-Based Quantitative Reliability Model

    It is well known that wireless sensor and actor networks are error-prone as multi-hop communications are carried out. Furthermore, the further the distance between two nodes is, the less the communication reliability is. Despite the fact that this issue has been studied in many publications, there are new publications still...

    Provided By Universidad de Malaga

  • White Papers // Apr 2009

    Programming Wireless Sensor Networks Applications Using SMEPP: A Case Study

    The SMEPP middleware is a secure and generic middleware, based on a new network centric abstract model for Embedded Peer-To-Peer (EP2P) systems based on services with security as a main design issue. It has an adaptable architecture which can be used in different devices ranging from standard PCs to motes....

    Provided By Universidad de Malaga

  • White Papers // Oct 2009

    Distortion Evaluation of DMT Signals on Indoor Broadband Power-Line Channels

    Indoor power-line channels are frequency and time selective. At this moment, the distortion suffered by DMT signals when traversing these channels must be accomplished by means of computationally intensive simulations, since no consensus on a statistical channel model has been reached yet. This paper proposes a simpler method to compute...

    Provided By Universidad de Malaga

  • White Papers // Oct 2010

    Correlation Between Static Measures and Code Coverage in Evolutionary Test Data Generation

    Evolutionary testing is a very popular domain in the field of search based software engineering that consists in automatically generating test data for a given piece of code using evolutionary algorithms. One of the most important measures used to evaluate the quality of the generated test suites is code coverage....

    Provided By Universidad de Malaga

  • White Papers // May 2012

    Interactive Specification and Verification of Behavioral Adaptation Contracts

    Services can be accessed and used to fulfill basic requirements, or can be composed with other services in order to build bigger systems which aim at working out complex tasks. These services must be equipped with rich interfaces to ease their reuse and enable their automatic composition. The authors can...

    Provided By Universidad de Malaga

  • White Papers // May 2013

    Cloud Computing Services Potential Analysis: An Integrated Model for Evaluating Software as a Service

    This paper address, in a practical and integrated model, a possible solution of issues concerning the Software as a Service (SaaS) introduction and evaluation. A selective top-down analysis is proposed to guide the overall assessment. The construction of the Potential Adoption Index (PAI), in the last stage of the process,...

    Provided By Universidad de Malaga

  • White Papers // Jun 2010

    QoSModeling for End-to-End Performance Evaluation Over Networks With Wireless Access

    This paper presents an end-to-end Quality of Service (QoS) model for assessing the performance of data services over networks with wireless access. The proposed model deals with performance degradation across protocol layers using a bottom-up strategy, starting with the physical layer and moving on up to the application layer. This...

    Provided By Universidad de Malaga

  • White Papers // Nov 2010

    YeastMed: An XML-Based System for Biological Data Integration of Yeast

    A key goal of bioinformatics is to create database systems and software platforms capable of storing and analysing large sets of biological data. Hundreds of biological databases are now available and provide access to huge amount of biological data. SGD, Yeastract, CYGD-MIPS, BioGrid and PhosphoGrid are five of the most...

    Provided By Universidad de Malaga

  • White Papers // Feb 2009

    ITACA: An Integrated Toolbox for the Automatic Composition and Adaptation of Web Services

    Adaptation is of utmost importance in systems developed by assembling reusable software services accessed through their public interfaces. This process aims at solving, as automatically as possible, mismatch cases which may be given at the different interoperability levels among interfaces by synthesizing a mediating adaptor. In this paper, the authors...

    Provided By Universidad de Malaga

  • White Papers // Apr 2006

    Effects of Working Capital Management on SME Profitability

    The corporate finance literature has traditionally focused on the study of long-term financial decisions. Researchers have particularly offered studies analyzing investments, capital structure, dividends or company valuation, among other topics. But the investment that firms make in short-term assets, and the resources used with maturities of under one year, represent...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    ITIO - Semantic Business Processes Based on Software-as-a-Service and Cloud Computing

    Recently, the economy has taken a downturn, which has forced many companies to reduce their costs in IT. According to experts, one interesting approach could be to outsource parts of their business through third parties. This will allow companies to free resources invested in outsourced business processes and to focus...

    Provided By Universidad de Malaga

  • White Papers // Jan 2014

    Validating a Token Coherence Protocol for Scientific Workloads

    Token coherence provides a flexible framework for designing new coherence protocols which decouples performance from correctness, easing the design of efficient coherence protocols. In this paper, the authors have implemented a coherence protocol for a cc-NUMA architecture based on TokenB using the RSIM performance simulator to validate previous claims about...

    Provided By Universidad de Malaga

  • White Papers // Mar 2007

    Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures

    Continuous improvements in integration scale have made major microprocessor vendors to move to designs that integrate several processor cores on the same chip. Chip Multi-Processors (CMPs) constitute the architecture of choice in the high performance embedded domain for several reasons such as better levels of scalability and performance/energy ratio. On...

    Provided By Universidad de Malaga

  • White Papers // Mar 2008

    A Fault-Tolerant Directory-Based Cache Coherence Protocol for CMP Architectures

    Current technology trends of increased scale of integration are pushing CMOS technology into the deep-submicron domain, enabling the creation of chips with a significantly greater number of transistors but also more prone to transient failures. Hence, computer architects will have to consider reliability as a prime concern for future Chip...

    Provided By Universidad de Malaga

  • White Papers // Jul 2008

    Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs

    One way of dealing with transient faults that will affect the interconnection network of future large-scale Chip Multi-Processor (CMP) systems is by extending the cache coherence protocol. Fault tolerance at the level of the cache coherence protocol has been proven to achieve very low performance overhead in absence of faults...

    Provided By Universidad de Malaga

  • White Papers // Feb 2008

    Achieving Predictable and Scalable Performance with BCS-MPI

    Demand for increasingly-higher computing capability is driving a similar growth in compute cluster sizes, soon to be reaching tens of thousands of processors. This growth is not matched however by system software, which has remained largely unchanged from the advent of clusters. The failure of system software to scale and...

    Provided By Universidad de Malaga

  • White Papers // Sep 2012

    Using Heterogeneous Networks to Improve Energy Efficiency in Direct Coherence Protocols for Many-Core CMPs

    Direct coherence protocols have been recently proposed as an alternative to directory-based protocols to keep cache coherence in many-core CMPs. Differently from directory-based protocols, in direct coherence the responsible for providing the requested data in case of a cache miss is also tasked with keeping the updated directory information and...

    Provided By Universidad de Malaga

  • White Papers // May 2009

    REPAS: Reliable Execution for Parallel ApplicationS in Tiled-CMPs

    The processors are becoming more susceptible to transient faults due to several factors such as technology scaling, voltage reduction, temperature fluctuations, process variation or signal cross-talking. Although there are many approaches exploring reliability for single-threaded applications, shared-memory environments have not been thoroughly studied. In this paper, the authors first study...

    Provided By Universidad de Malaga

  • White Papers // Feb 2009

    Speculation-Based Conflict Resolution in Hardware Transactional Memory

    Conflict management is a key design dimension of Hardware Transactional Memory (HTM) systems, and the implementation of efficient mechanisms for detection and resolution becomes critical when conflicts are not a rare event. Current designs address this problem from two opposite perspectives, namely, lazy and eager schemes. While the former approach...

    Provided By Universidad de Malaga

  • White Papers // May 2008

    Evaluating Dynamic Core Coupling in a Scalable Tiled-CMP Architecture

    To obtain benefit of the increasing transistor count in current processors, designs are leading to Chip Multi-Processors (CMPs) that will integrate tens or hundreds of processor cores on-chip. However, scaling and voltage factors are increasing susceptibility of architectures to transient, intermittent and permanent faults, as well as process variations. A...

    Provided By Universidad de Malaga

  • White Papers // Aug 2008

    Directory-Based Conflict Detection in Hardware Transactional Memory

    One of the key design points of any Hardware Transactional Memory (HTM) system is the conflict detection mechanism, and its efficient implementation becomes critical when conflicts are not a rare event. While many contemporary proposals rely on the coherence protocol to carry out conflict detection at the private cache levels,...

    Provided By Universidad de Malaga

  • White Papers // May 2011

    Self-Related Traces: An Alternative to Full-System Simulation for NoCs

    The Network-on-Chip (NoC) has become an integral part of multicore systems and Multi-Processor System-on-Chips (MPSoCs). Detailed simulation models are one of the most common techniques to evaluate the performance of a NoC. Most of these models only include a subset of the complete architecture and use only synthetic traffic. However,...

    Provided By Universidad de Malaga

  • White Papers // Jun 2011

    Energy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation

    As the number of cores in a chip increases, power consumption is becoming a major constraint in the design of chip multiprocessors. At the same time, server consolidation is gaining importance to take advantage of such a number of cores. Their goal is to alleviate this constraint by reducing the...

    Provided By Universidad de Malaga

  • White Papers // Jan 2011

    EMC2: Extending Magny-Cours Coherence for Large-Scale Servers

    The demand of larger and more powerful high-performance shared-memory servers is growing over the last few years. To meet this need, AMD has recently launched the twelve-core Magny-Cours processors. They include a directory cache (Probe Filter) that increases the scalability of the coherence protocol applied by Opterons, based on coherent...

    Provided By Universidad de Malaga

  • White Papers // Jan 2014

    Direct Coherence: Bringing Together Performance and Scalability in Shared-Memory Multiprocessors

    Traditional directory-based cache coherence protocols suffer from long-latency cache misses as a consequence of the indirection introduced by the home node, which must be accessed on every cache miss before any coherence action can be performed. In this paper, the authors present a new protocol that moves the role of...

    Provided By Universidad de Malaga

  • White Papers // Jan 2014

    A Novel Lightweight Directory Architecture for Scalable Shared-Memory Multiprocessors

    There are two important hurdles that restrict the scalability of directory-based shared-memory multiprocessors: the directory memory overhead and the long L2 miss latencies due to the indirection introduced by the accesses to directory information, usually stored in main memory. In this paper, the authors present a lightweight directory architecture aimed...

    Provided By Universidad de Malaga

  • White Papers // Apr 2008

    DiCo-CMP: Efficient Cache Coherency in Tiled CMP Architectures

    Future CMP designs that will integrate tens of processor cores on-chip will be constrained by area and power. Area constraints make impractical the use of a bus or a crossbar as the on-chip interconnection network, and tiled CMPs organized around a direct interconnection network will probably be the architecture of...

    Provided By Universidad de Malaga

  • White Papers // Dec 2009

    A Novel Hardware-Based Barrier Synchronization for Many-Core CMPs

    In this paper, the authors have presented a novel hardware-based barrier mechanism for many-core CMPs. Their architecture has not any influence on the conventional memory system to conduct the synchronization: no shared variables, no coherence traffic and no traffic across the interconnection network. Instead, it relies on one-bit messages across...

    Provided By Universidad de Malaga

  • White Papers // Jul 2010

    Low-Overhead Organizations for the Directory in Future Many-Core CMPs

    If current trends continue, today's small-scale general-purpose CMPs will soon be replaced by multi-core architectures integrating tens or even hundreds of cores on-chip. These many-core CMPs will implement the hardware-managed, implicitly-addressed, coherent caches memory model. Cache coherence in these designs will be maintained through a directory-based cache coherence protocol implemented...

    Provided By Universidad de Malaga

  • White Papers // Apr 2012

    Cache Miss Characterization in Hierarchical Large-Scale Cache-Coherent Systems

    There is a growing trend towards developing large-scale cache-coherent systems by using commodity symmetric multiprocessors, which requires to extend their coherence protocol. In such systems, cache coherence transactions issued due to cache misses traverse interconnection networks with very different topologies and latencies. In this paper, the authors perform a cache...

    Provided By Universidad de Malaga

  • White Papers // Jul 2013

    Temporal-Aware Mechanism to Detect Private Data in Chip Multiprocessors

    Most of the data referenced by sequential and parallel applications running in current chip multiprocessors are referenced by only one thread and can be considered as private data. A lot of recent proposals leverage this observation to improve many aspects of chip multiprocessors, such as reducing coherence overhead or the...

    Provided By Universidad de Malaga