Virginia Systems

Displaying 1-40 of 52 results

  • White Papers // Jan 2014

    Online Performance Projection for Clusters with Heterogeneous GPUs

    The authors present a fully automated approach to project the relative performance of an OpenCL program over different GPUs. Performance projections can be made within a small amount of time, and the projection overhead stays relatively constant with the input data size. As a result, the technique can help runtime...

    Provided By Virginia Systems

  • White Papers // Jan 2014

    Consolidating Applications for Energy Efficiency in Heterogeneous Computing Systems

    By scheduling multiple applications with complementary resource requirements on a smaller number of compute nodes, the authors aim to improve performance, resource utilization, energy consumption, and energy efficiency simultaneously. In addition to their naive consolidation approach, which already achieves the aforementioned goals, they propose a new Energy Efficiency-Aware (EEA) scheduling...

    Provided By Virginia Systems

  • White Papers // Dec 2013

    Wideband Channelization for Software-Defined Radio via Mobile Graphics Processors

    Wideband channelization is a computationally intensive task within Software-Defined Radio (SDR). To support this task, the underlying hardware should provide high performance and allow flexible implementations. Traditional solutions use Field-Programmable Gate Arrays (FPGAs) to satisfy these requirements. While FPGAs allow for flexible implementations, realizing a FPGA implementation is a difficult...

    Provided By Virginia Systems

  • White Papers // Dec 2013

    Characterizing the Challenges and Evaluating the Efficacy of a CUDA-to-OpenCL Translator

    Recent trends in processor architectures utilize available transistors to provide large numbers of execution cores, and hence threads, rather than attempting to speed-up the execution of a single thread or a small number of threads. The proliferation of heterogeneous computing systems has led to increased interest in parallel architectures and...

    Provided By Virginia Systems

  • White Papers // Oct 2013

    On the Programmability and Performance of Heterogeneous Platforms

    Many application areas, including finance, life sciences, physics, and manufacturing, have begun to use computational co-processors such as Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), Digital Signal Processors (DSPs), and even customized Application-Specific Integrated Circuits (ASICs) to achieve substantial gains in performance per watt and performance per dollar...

    Provided By Virginia Systems

  • White Papers // Aug 2013

    EDR: An Energy-Aware Runtime Load Distribution System for Data-Intensive Applications in the Cloud

    Data centers account for a growing percentage of US power consumption. Energy efficiency is now a first-class design constraint for the data centers that support cloud services. Service providers must distribute their data efficiently across multiple data centers. This includes creation of data replicas that provide multiple copies of data...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    On Real-Time STM Concurrency Control for Embedded Software with Improved Schedulability

    Concurrency is intrinsic to embedded software, as they control concurrent physical processes. Often, such concurrent computations need to read/write shared data objects. They must also satisfy time constraints. The authors consider Software Transactional Memory (STM) concurrency control for embedded multicore real-time software, and present a novel contention manager for resolving...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    FBLT: A Real-Time Contention Manager with Improved Schedulability

    Embedded systems sense physical processes and control their behavior, typically through feedback loops. The authors consider Software Transactional Memory (STM) concurrency control for embedded multicore real-time software, and present a novel contention manager for resolving transactional conflicts, called FBLT. They upper bound transactional retries and task response times under FBLT,...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    Energy-Architecture Tuning for ECC-Based RFID Tags

    The implementation of Elliptic Curve Cryptography (ECC) on small microcontrollers is challenging. Past research has therefore emphasized performance optimization: pick target architecture, and minimize the cycle count and footprint of the ECC software. This paper addresses a different aspect of resource-constrained ECC implementation: given the application profile, identify the most...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    pVOCL: Power-Aware Dynamic Placement and Migration in Virtualized GPU Environments

    Power-hungry Graphics Processing Unit (GPU) accelerators are ubiquitous in high performance computing data centers today. GPU virtualization frameworks introduce new opportunities for effective management of GPU resources by decoupling them from application execution. However, power management of GPU-enabled server clusters faces significant challenges. The underlying system infrastructure shows complex power...

    Provided By Virginia Systems

  • White Papers // Jun 2013

    Synchronization and Ordering Semantics in Hybrid MPI+GPU Programming

    Graphics Processing Units (GPUs) have gained widespread use as general-purpose computational accelerators and have been studied extensively across a broad range of scientific applications. Despite the vast interest in accelerator-based systems, programming large multinode GPUs is still a complex task, particularly with respect to optimal data movement across the host-GPU...

    Provided By Virginia Systems

  • White Papers // May 2013

    Model-Based, Memory-Centric Performance and Power Optimization on NUMA Multiprocessors

    Non-Uniform Memory Access (NUMA) architectures are ubiquitous in HPC systems. NUMA along with other factors including socket layout, data placement, and memory contention significantly increase the search space to find an optimal mapping of applications to NUMA systems. This search space may be intractable for online optimization and challenging for...

    Provided By Virginia Systems

  • White Papers // May 2013

    Optimizing Burrows-Wheeler Transform-Based Sequence Alignment on Multicore Architectures

    Computational biology sequence alignment tools using the Burrows-Wheeler Transform (BWT) are widely used in Next-Generation Sequencing (NGS) analysis. However, despite extensive optimization efforts, the performance of these tools still cannot keep up with the explosive growth of sequencing data. Through an in-depth performance analysis of BWA, a popular BWT-based aligner...

    Provided By Virginia Systems

  • White Papers // Apr 2013

    Low-Cost and Area-Efficient FPGA Implementations of Lattice-Based Cryptography

    Lattice-based cryptography relies on the hardness of lattice problems. Lattice-based cryptosystems are quantum resistant and are often provably secure based on worst-case hardness assumptions. The interest in lattice-based cryptography is increasing due to its quantum resistance and its provable security under some worst-case hardness assumptions. As this is a relatively...

    Provided By Virginia Systems

  • White Papers // Mar 2013

    Scheduling Open-Nested Transactions in Distributed Transactional Memory

    Distributed Transactional Memory (DTM) is a powerful concurrency control model for distributed systems sparing the programmer from the complexity of manual implementation of lock-based distributed synchronization. The authors consider Herlihy and Sun's data flow DTM model, where objects are migrated to invoking transactions, and the open nesting model of managing...

    Provided By Virginia Systems

  • White Papers // Feb 2013

    A Simplified and Accurate Model of Power-Performance Efficiency on Emergent GPU Architectures

    Emergent heterogeneous systems must be optimized for both power and performance at exascale. Massive parallelism combined with complex memory hierarchies form a barrier to efficient application and architecture design. These challenges are exacerbated with GPUs as parallelism increases orders of magnitude and power consumption can easily double. Models have been...

    Provided By Virginia Systems

  • White Papers // Jan 2013

    An Efficient Interference Management Framework for Multi-Hop Wireless Networks

    Interference management is an important problem in wireless networks. In this paper, the authors focus on the Successive Interference Cancellation (SIC) technique, and aim to design an efficient cross-layer solution to increase throughput for multi-hop wireless networks with SIC. They realize that the challenge of this problem is its mixed...

    Provided By Virginia Systems

  • White Papers // Nov 2012

    Efficient Algorithms for Maximum Link Scheduling in Distributed Computing Models With SINR Constraints

    In this paper, the authors develop a set of fast distributed algorithms in the SINR model, providing constant approximation for the maximum link scheduling problem under uniform power assignment. They find that different aspects of available technology, such as full/half duplex communication, and non-adaptive/adaptive power control, have a significant impact...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    An Iso-Energy-Efficient Approach to Scalable System Power-Performance Optimization

    The power consumption of a large scale system ultimately limits its performance. Consuming less energy while preserving performance leads to better system utilization at scale. The iso-energy-efficiency model was proposed as a metric and methodology for explaining power and performance efficiency on scalable systems. For use in practice, the authors...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    System-level, Unified In-band and Out-of-band Dynamic Thermal Control

    High-density computer racks become increasingly commonplace in supercomputing centers and data centers. With tight integration of high-powered computing components in the racks, hot spots or pockets of elevated temperatures on the chips and system can be easily formed when room air circulation is not effective. Hot spots reduce the reliability...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Critical Path-Based Thread Placement for NUMA Systems

    Multicore multiprocessors use a Non Uniform Memory Architecture (NUMA) to improve their scalability. However, NUMA introduces performance penalties due to remote memory accesses. Without efficiently managing data layout and thread mapping to cores, scientific applications may suffer performance loss, even if they are optimized for NUMA. In this paper, the...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Storage Power Optimizations for Client Devices and Data Centers

    Storage devices are essential to all computing systems that store user data from desktops, to notebooks and Ultrabooks to data centers. Hard Disk Drives (HDDs) or Solid State Drives (SSDs) are today's most popular storage solutions. Active power for storage devices has significant impact on the battery life of client...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Energy Profiling and Analysis of the HPC Challenge Benchmarks

    Future high performance systems must use energy efficiently to achieve PFLOPS computational speeds and beyond. To address this challenge, the authors must first understand the power and energy characteristics of high performance computing applications. In this paper, they use a power-performance profiling framework called PowerPack to study the power and...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Integrated Multi-Network Modeling Environment for Spectrum Management

    Modeling and analysis of spectrum demand in large scale urban regions is key to effective Dynamic Spectrum Access (DSA) in the next generation networks. Some of the recent work on characterizing cellular traffic has been done by empirical analysis of proprietary cellular provider data, or by the use of stochastic...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Distributed Approximation Algorithms for Maximum Link Scheduling and Local Broadcasting in the Physical Interference Model

    In this paper, the authors develop the first rigorous distributed algorithm for link scheduling in the SINR model under any length-monotone sub-linear power assignments (including linear, square-root, uniform power assignments). Their algorithms give constant factor approximation guarantees, matching the bounds of the sequential algorithms for these problems, with provable bounds...

    Provided By Virginia Systems

  • White Papers // Jun 2012

    Lost in Translation: Challenges in Automating CUDA-to-OpenCL Translation

    The use of accelerators in high-performance computing is increasing. The most commonly used accelerator is the Graphics Processing Unit (GPU) because of its low cost and massively parallel performance. The two most common programming environments for GPU accelerators are CUDA and OpenCL. While CUDA runs natively only on NVIDIA GPUs,...

    Provided By Virginia Systems

  • White Papers // Jun 2012

    Theorizing in Information Systems Research Using Focus Groups

    Information Systems researchers have embraced a number of qualitative research approaches and methodologies, including interviews, observations, and even action research. One research method gaining visibility in IS research is the focus group research method. Focus groups have the potential to provide great insights into phenomena of interest to IS researchers...

    Provided By Virginia Systems

  • White Papers // May 2012

    Efficient Jamming Attacks on MIMO Channels

    This paper investigates efficient jamming attacks against MIMO-enabled systems. Previous research has focused on jamming data transmissions. The authors instead focus on jamming channel sounding symbols, and introduce the MIMO Singularity Attack, which attempts to reduce the rank of the channel gain matrix estimate by the receiver through transmission of...

    Provided By Virginia Systems

  • White Papers // May 2012

    Performance of Pilot Jamming on MIMO Channels With Imperfect Synchronization

    This paper explores effects of pilot based jamming attacks with synchronization mismatches on MIMO-OFDM systems. Both MIMO and OFDM based systems employ known data called pilot tones to estimate the channel frequency response and perform equalization. Jamming pilot tones can potentially disrupt the channel estimation and equalization, thus making the...

    Provided By Virginia Systems

  • White Papers // May 2012

    Geolocation of MIMO Signals Using the Cross Ambiguity Function and TDOA/FDOA

    The geolocation of RF signals has many civilian and military applications. One technique for geolocation involves using the Cross Ambiguity Function (CAF) to calculate the Time Difference-Of-Arrival (TDOA) and Frequency-Difference-Of-Arrival (FDOA) of the emitted signal using two receivers. Until recently most RF signals fell under the category of Single-Input-Single-Output (SISO)....

    Provided By Virginia Systems

  • White Papers // Apr 2012

    Low Complexity Multi-Layer Optimization for Multi-Hop Wireless Networks

    The authors design a low-complexity solution to multi-layer optimization in multi-hop wireless networks with throughput objectives. Considering channel sensing and power control at the physical layer, they formulate resource allocation as a non-convex throughput optimization problem that allows distributed implementation. They develop a genetic algorithm to solve this physical layer...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Generalizing the Utility of GPUs in Large-Scale Heterogeneous Computing Systems

    Graphics Processing Units (GPUs) have been widely used as accelerators in large-scale heterogeneous computing systems. However, current programming models can only support the utilization of local GPUs. When using non-local GPUs, programmers need to explicitly call API functions for data communication across computing nodes. As such, programming GPUs in large-scale...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Scheduling Closed-Nested Transactions in Distributed Transactional Memory

    Distributed Software Transactional Memory (DSTM) is an emerging, alternative concurrency control model for distributed systems that promises to alleviate the difficulties of lock-based distributed synchronization - e.g., distributed deadlocks, livelocks, and lock convoying. The authors consider Herlihy and Sun's dataflow D-STM model, where objects are migrated to invoking transactions, and...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Heterogeneous Task Scheduling for Accelerated OpenMP

    Heterogeneous systems with CPUs and computational accelerators such as GPUs, FPGAs or the upcoming Intel MIC are becoming mainstream. In these systems, peak performance includes the performance of not just the CPUs but also all available accelerators. In spite of this fact, the majority of programming models for heterogeneous computing...

    Provided By Virginia Systems

  • White Papers // Jan 2012

    HydraVM: Extracting Parallelism from Legacy Sequential Code Using STM

    Many organizations with enterprise-class legacy software are increasingly faced with a hardware technology refresh challenge due to the ubiquity of Chip Multi-Processor (CMP) hardware. This problem is significant when legacy codebases run into several million LOC and are not significantly concurrent (often intentionally designed to be sequential to reduce development...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    On Closed Nesting in Distributed Transactional Memory

    Distributed-Software Transactional Memory (D-STM) is a recent but promising model for programming distributed systems. It aims to present programmers with a simple to use abstraction (transactions), while maintaining performance and scalability similar to distributed fine-grained locks. Any complications usually associated with such locks (i.e. distributed deadlock) are avoided. Building upon...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    CU2CL: A CUDA-to-OpenCL Translator for Multi- and Many-core Architectures

    The use of Graphics Processing Units (GPUs) in high-performance parallel computing continues to become more prevalent, often as part of a heterogeneous system. For years, CUDA has been the de facto programming environment for nearly all General-Purpose GPU (GPGPU) applications. In spite of this, the framework is available only on...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    Architecture-Aware Mapping and Optimization on a 1600-Core GPU

    The Graphics Processing Unit (GPU) continues to make in-roads as a computational accelerator for HighPerformance Computing (HPC). However, despite its increasing popularity, mapping and optimizing GPU code remains a difficult task; it is a multi-dimensional problem that requires deep technical knowledge of GPU architecture. Although substantial literature exists on how...

    Provided By Virginia Systems

  • White Papers // Oct 2011

    StreamMR: An Optimized MapReduce Framework for AMD GPUs

    MapReduce is a programming model from Google that facilitates parallel processing on a cluster of thousands of commodity computers. The success of MapReduce in cluster environments has motivated several studies of implementing MapReduce on a Graphics Processing Unit (GPU), but generally focusing on the NVIDIA GPU. The authors' investigation reveals...

    Provided By Virginia Systems

  • White Papers // Aug 2011

    Spectral Method Characterization on FPGA and GPU Accelerators

    The increasing demand for High Performance Computing (HPC) across myriad environments, ranging from traditional supercomputers to embedded devices has outpaced the conventional processor's ability to deliver performance. As CPU clock frequencies plateau and the doubling of CPU cores per processor exacerbate the memory wall, hybrid core computing, utilizing CPUs augmented...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Generalizing the Utility of GPUs in Large-Scale Heterogeneous Computing Systems

    Graphics Processing Units (GPUs) have been widely used as accelerators in large-scale heterogeneous computing systems. However, current programming models can only support the utilization of local GPUs. When using non-local GPUs, programmers need to explicitly call API functions for data communication across computing nodes. As such, programming GPUs in large-scale...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Heterogeneous Task Scheduling for Accelerated OpenMP

    Heterogeneous systems with CPUs and computational accelerators such as GPUs, FPGAs or the upcoming Intel MIC are becoming mainstream. In these systems, peak performance includes the performance of not just the CPUs but also all available accelerators. In spite of this fact, the majority of programming models for heterogeneous computing...

    Provided By Virginia Systems

  • White Papers // Jun 2012

    Lost in Translation: Challenges in Automating CUDA-to-OpenCL Translation

    The use of accelerators in high-performance computing is increasing. The most commonly used accelerator is the Graphics Processing Unit (GPU) because of its low cost and massively parallel performance. The two most common programming environments for GPU accelerators are CUDA and OpenCL. While CUDA runs natively only on NVIDIA GPUs,...

    Provided By Virginia Systems

  • White Papers // Aug 2011

    Spectral Method Characterization on FPGA and GPU Accelerators

    The increasing demand for High Performance Computing (HPC) across myriad environments, ranging from traditional supercomputers to embedded devices has outpaced the conventional processor's ability to deliver performance. As CPU clock frequencies plateau and the doubling of CPU cores per processor exacerbate the memory wall, hybrid core computing, utilizing CPUs augmented...

    Provided By Virginia Systems

  • White Papers // Oct 2011

    StreamMR: An Optimized MapReduce Framework for AMD GPUs

    MapReduce is a programming model from Google that facilitates parallel processing on a cluster of thousands of commodity computers. The success of MapReduce in cluster environments has motivated several studies of implementing MapReduce on a Graphics Processing Unit (GPU), but generally focusing on the NVIDIA GPU. The authors' investigation reveals...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    CU2CL: A CUDA-to-OpenCL Translator for Multi- and Many-core Architectures

    The use of Graphics Processing Units (GPUs) in high-performance parallel computing continues to become more prevalent, often as part of a heterogeneous system. For years, CUDA has been the de facto programming environment for nearly all General-Purpose GPU (GPGPU) applications. In spite of this, the framework is available only on...

    Provided By Virginia Systems

  • White Papers // Jan 2011

    GPU-RMAP: Accelerating Short-Read Mapping on Graphics Processors

    Next-generation, high-throughput sequencers are now capable of producing hundreds of billions of short sequences (reads) in a single day. The task of accurately mapping the reads back to a reference genome is of particular importance because it is used in several other biological applications, e.g., genome re-sequencing, DNA methylation, and...

    Provided By Virginia Systems

  • White Papers // Jul 2011

    Performance Characterization and Optimization of Atomic Operations on AMD GPUs

    Atomic operations are important building blocks in supporting general-purpose computing on Graphics Processing Units (GPUs). For instance, they can be used to coordinate execution between concurrent threads, and in turn, assist in constructing complex data structures such as hash tables or implementing GPU-wide barrier synchronization. While the performance of atomic...

    Provided By Virginia Systems

  • White Papers // Dec 2013

    Characterizing the Challenges and Evaluating the Efficacy of a CUDA-to-OpenCL Translator

    Recent trends in processor architectures utilize available transistors to provide large numbers of execution cores, and hence threads, rather than attempting to speed-up the execution of a single thread or a small number of threads. The proliferation of heterogeneous computing systems has led to increased interest in parallel architectures and...

    Provided By Virginia Systems

  • White Papers // Jan 2014

    Online Performance Projection for Clusters with Heterogeneous GPUs

    The authors present a fully automated approach to project the relative performance of an OpenCL program over different GPUs. Performance projections can be made within a small amount of time, and the projection overhead stays relatively constant with the input data size. As a result, the technique can help runtime...

    Provided By Virginia Systems

  • White Papers // Oct 2013

    On the Programmability and Performance of Heterogeneous Platforms

    Many application areas, including finance, life sciences, physics, and manufacturing, have begun to use computational co-processors such as Graphics Processing Units (GPUs), Field Programmable Gate Arrays (FPGAs), Digital Signal Processors (DSPs), and even customized Application-Specific Integrated Circuits (ASICs) to achieve substantial gains in performance per watt and performance per dollar...

    Provided By Virginia Systems

  • White Papers // Dec 2013

    Wideband Channelization for Software-Defined Radio via Mobile Graphics Processors

    Wideband channelization is a computationally intensive task within Software-Defined Radio (SDR). To support this task, the underlying hardware should provide high performance and allow flexible implementations. Traditional solutions use Field-Programmable Gate Arrays (FPGAs) to satisfy these requirements. While FPGAs allow for flexible implementations, realizing a FPGA implementation is a difficult...

    Provided By Virginia Systems

  • White Papers // Jan 2014

    Consolidating Applications for Energy Efficiency in Heterogeneous Computing Systems

    By scheduling multiple applications with complementary resource requirements on a smaller number of compute nodes, the authors aim to improve performance, resource utilization, energy consumption, and energy efficiency simultaneously. In addition to their naive consolidation approach, which already achieves the aforementioned goals, they propose a new Energy Efficiency-Aware (EEA) scheduling...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    pVOCL: Power-Aware Dynamic Placement and Migration in Virtualized GPU Environments

    Power-hungry Graphics Processing Unit (GPU) accelerators are ubiquitous in high performance computing data centers today. GPU virtualization frameworks introduce new opportunities for effective management of GPU resources by decoupling them from application execution. However, power management of GPU-enabled server clusters faces significant challenges. The underlying system infrastructure shows complex power...

    Provided By Virginia Systems

  • White Papers // Jun 2013

    Synchronization and Ordering Semantics in Hybrid MPI+GPU Programming

    Graphics Processing Units (GPUs) have gained widespread use as general-purpose computational accelerators and have been studied extensively across a broad range of scientific applications. Despite the vast interest in accelerator-based systems, programming large multinode GPUs is still a complex task, particularly with respect to optimal data movement across the host-GPU...

    Provided By Virginia Systems

  • White Papers // May 2013

    Optimizing Burrows-Wheeler Transform-Based Sequence Alignment on Multicore Architectures

    Computational biology sequence alignment tools using the Burrows-Wheeler Transform (BWT) are widely used in Next-Generation Sequencing (NGS) analysis. However, despite extensive optimization efforts, the performance of these tools still cannot keep up with the explosive growth of sequencing data. Through an in-depth performance analysis of BWA, a popular BWT-based aligner...

    Provided By Virginia Systems

  • White Papers // Jun 2012

    Theorizing in Information Systems Research Using Focus Groups

    Information Systems researchers have embraced a number of qualitative research approaches and methodologies, including interviews, observations, and even action research. One research method gaining visibility in IS research is the focus group research method. Focus groups have the potential to provide great insights into phenomena of interest to IS researchers...

    Provided By Virginia Systems

  • White Papers // Mar 2011

    Impact of Geographic Complementarity in Dynamic Spectrum Access

    In this paper, the authors examines the impact of demand bids which account for geographic complementarity in spectrum demand, on the allocation and pricing of wireless spectrum licenses. Using an individual based simulation environment and a model of spectrum demand for the region of Portland, OR, they studied a primary...

    Provided By Virginia Systems

  • White Papers // Nov 2012

    Efficient Algorithms for Maximum Link Scheduling in Distributed Computing Models With SINR Constraints

    In this paper, the authors develop a set of fast distributed algorithms in the SINR model, providing constant approximation for the maximum link scheduling problem under uniform power assignment. They find that different aspects of available technology, such as full/half duplex communication, and non-adaptive/adaptive power control, have a significant impact...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Distributed Approximation Algorithms for Maximum Link Scheduling and Local Broadcasting in the Physical Interference Model

    In this paper, the authors develop the first rigorous distributed algorithm for link scheduling in the SINR model under any length-monotone sub-linear power assignments (including linear, square-root, uniform power assignments). Their algorithms give constant factor approximation guarantees, matching the bounds of the sequential algorithms for these problems, with provable bounds...

    Provided By Virginia Systems

  • White Papers // Aug 2012

    Integrated Multi-Network Modeling Environment for Spectrum Management

    Modeling and analysis of spectrum demand in large scale urban regions is key to effective Dynamic Spectrum Access (DSA) in the next generation networks. Some of the recent work on characterizing cellular traffic has been done by empirical analysis of proprietary cellular provider data, or by the use of stochastic...

    Provided By Virginia Systems

  • White Papers // Feb 2010

    Implications of Dynamic Spectrum Access on the Efficiency of Primary Wireless Market

    In this paper, the authors develop a microscopic, agent-based simulation tool, called SIGMA-SPECTRUM to study the dynamics of the primary wireless spectrum market. A detailed, synthetic demand model, is used to produce disaggregated spectrum demand profiles that vary spatially and temporally for each individual in the population. They implement a...

    Provided By Virginia Systems

  • White Papers // Feb 2010

    Synthesis and Analysis of Spatio-Temporal Spectrum Demand Patterns: A First Principles Approach

    Modeling and analysis of Primary User (PU) spectrum requirement is key to effective Dynamic Spectrum Access (DSA). Allocation of long term licenses, as well as opportunistic spectrum usage by Secondary Users (SU) cannot be done without accurate modeling of PU behavior. This is especially important in the case of cellular...

    Provided By Virginia Systems

  • White Papers // Oct 2009

    Location Estimation Using Differential RSS with Spatially Correlated Shadowing

    In this paper, the authors propose a new localization technique using Differential Received Signal Strength (DRSS) which does not require signal source cooperation for location estimation. Specifically, they introduce a DRSS-based localization framework as well as its geometric interpretation for both local and global positioning to facilitate understanding of the...

    Provided By Virginia Systems

  • White Papers // May 2011

    An enhanced Index Structure for a Digital Library Search Engine

    The focus of this paper is to design an efficient indexing structure for spatial-temporal-textual data in a digital library environment. Along with traditional document collections, modern digital libraries contain forum discussions, blog-posts, user provided URLs, and many other digital artifacts. All of these artifacts have time stamps, most of these...

    Provided By Virginia Systems

  • White Papers // Apr 2012

    Low Complexity Multi-Layer Optimization for Multi-Hop Wireless Networks

    The authors design a low-complexity solution to multi-layer optimization in multi-hop wireless networks with throughput objectives. Considering channel sensing and power control at the physical layer, they formulate resource allocation as a non-convex throughput optimization problem that allows distributed implementation. They develop a genetic algorithm to solve this physical layer...

    Provided By Virginia Systems

  • White Papers // Jan 2013

    An Efficient Interference Management Framework for Multi-Hop Wireless Networks

    Interference management is an important problem in wireless networks. In this paper, the authors focus on the Successive Interference Cancellation (SIC) technique, and aim to design an efficient cross-layer solution to increase throughput for multi-hop wireless networks with SIC. They realize that the challenge of this problem is its mixed...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    Energy-Architecture Tuning for ECC-Based RFID Tags

    The implementation of Elliptic Curve Cryptography (ECC) on small microcontrollers is challenging. Past research has therefore emphasized performance optimization: pick target architecture, and minimize the cycle count and footprint of the ECC software. This paper addresses a different aspect of resource-constrained ECC implementation: given the application profile, identify the most...

    Provided By Virginia Systems

  • White Papers // Apr 2013

    Low-Cost and Area-Efficient FPGA Implementations of Lattice-Based Cryptography

    Lattice-based cryptography relies on the hardness of lattice problems. Lattice-based cryptosystems are quantum resistant and are often provably secure based on worst-case hardness assumptions. The interest in lattice-based cryptography is increasing due to its quantum resistance and its provable security under some worst-case hardness assumptions. As this is a relatively...

    Provided By Virginia Systems

  • White Papers // Dec 2006

    Restoring End-to-End Resilience in the Presence of Middleboxes

    The philosophy upon which the Internet was built places the intelligence close to the edge. As the Internet has matured, intermediate devices or middleboxes, such as firewalls or application gateways, have been introduced, thereby weakening the end-to-end nature of the network. As a result, applications must often modify their behavior...

    Provided By Virginia Systems

  • White Papers // Aug 2013

    EDR: An Energy-Aware Runtime Load Distribution System for Data-Intensive Applications in the Cloud

    Data centers account for a growing percentage of US power consumption. Energy efficiency is now a first-class design constraint for the data centers that support cloud services. Service providers must distribute their data efficiently across multiple data centers. This includes creation of data replicas that provide multiple copies of data...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    On Real-Time STM Concurrency Control for Embedded Software with Improved Schedulability

    Concurrency is intrinsic to embedded software, as they control concurrent physical processes. Often, such concurrent computations need to read/write shared data objects. They must also satisfy time constraints. The authors consider Software Transactional Memory (STM) concurrency control for embedded multicore real-time software, and present a novel contention manager for resolving...

    Provided By Virginia Systems

  • White Papers // Feb 2012

    Scheduling Closed-Nested Transactions in Distributed Transactional Memory

    Distributed Software Transactional Memory (DSTM) is an emerging, alternative concurrency control model for distributed systems that promises to alleviate the difficulties of lock-based distributed synchronization - e.g., distributed deadlocks, livelocks, and lock convoying. The authors consider Herlihy and Sun's dataflow D-STM model, where objects are migrated to invoking transactions, and...

    Provided By Virginia Systems

  • White Papers // Jul 2013

    FBLT: A Real-Time Contention Manager with Improved Schedulability

    Embedded systems sense physical processes and control their behavior, typically through feedback loops. The authors consider Software Transactional Memory (STM) concurrency control for embedded multicore real-time software, and present a novel contention manager for resolving transactional conflicts, called FBLT. They upper bound transactional retries and task response times under FBLT,...

    Provided By Virginia Systems

  • White Papers // Jan 2012

    HydraVM: Extracting Parallelism from Legacy Sequential Code Using STM

    Many organizations with enterprise-class legacy software are increasingly faced with a hardware technology refresh challenge due to the ubiquity of Chip Multi-Processor (CMP) hardware. This problem is significant when legacy codebases run into several million LOC and are not significantly concurrent (often intentionally designed to be sequential to reduce development...

    Provided By Virginia Systems

  • White Papers // Mar 2013

    Scheduling Open-Nested Transactions in Distributed Transactional Memory

    Distributed Transactional Memory (DTM) is a powerful concurrency control model for distributed systems sparing the programmer from the complexity of manual implementation of lock-based distributed synchronization. The authors consider Herlihy and Sun's data flow DTM model, where objects are migrated to invoking transactions, and the open nesting model of managing...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    On Closed Nesting in Distributed Transactional Memory

    Distributed-Software Transactional Memory (D-STM) is a recent but promising model for programming distributed systems. It aims to present programmers with a simple to use abstraction (transactions), while maintaining performance and scalability similar to distributed fine-grained locks. Any complications usually associated with such locks (i.e. distributed deadlock) are avoided. Building upon...

    Provided By Virginia Systems

  • White Papers // Dec 2011

    Architecture-Aware Mapping and Optimization on a 1600-Core GPU

    The Graphics Processing Unit (GPU) continues to make in-roads as a computational accelerator for HighPerformance Computing (HPC). However, despite its increasing popularity, mapping and optimizing GPU code remains a difficult task; it is a multi-dimensional problem that requires deep technical knowledge of GPU architecture. Although substantial literature exists on how...

    Provided By Virginia Systems

  • White Papers // Jul 2011

    On the Efficacy of a Fused CPU+GPU Processor (or APU) for Parallel Computing

    The Graphics Processing Unit (GPU) has made significant strides as an accelerator in parallel computing. However, because the GPU has resided out on PCIe as a discrete device, the performance of GPU applications can be bottlenecked by data transfers between the CPU and GPU over PCIe. Emerging heterogeneous computing architectures...

    Provided By Virginia Systems

  • White Papers // Feb 2011

    Towards Accelerating Molecular Modeling Via Multi-Scale Approximation on a GPU

    Research efforts to analyze biomolecular properties contribute towards the authors' understanding of biomolecular function. Calculating non-bonded forces (or in their case, electrostatic surface potential) is often a large portion of the computational complexity in analyzing biomolecular properties. Therefore, reducing the computational complexity of these force calculations, either by improving the...

    Provided By Virginia Systems