Date Added: Apr 2012
The Array architecture is a popular technique to implement the multipliers due to its compact structure. In this paper, 2x2 array multiplier circuits using existing full adder and DCVS logic full adder have been designed, simulated, analyzed and compared. An extensive analysis of multipliers has been done. According to the authors test results, an array multiplier designed by DCVS logic full adder is showing best result in terms of power consumption with varying supply voltage, temperature and operating frequency. The simulation has been carried out on Tanner EDA tool on BSIM3v3 90nm technology.