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A 50Mbps, 2.24mm2 double-binary turbo decoder is designed and implemented in 0.13?m CMOS process for the WiMAX standard. To reduce the large extrinsic memory needed in double-binary turbo decoding, the proposed decoder exchanges the bit-level extrinsic information values rather than the traditional symbol-level extrinsic information values, which is achieved by deriving two simple conversions. The proposed turbo decoder, with a low-complexity hardware interleaver generating interleaved addresses for two data flows simultaneously, provides an efficient stopping criterion for double-binary turbo decoding using bit-level extrinsic information as well as huge memory size reduction of 20.6%.
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