A Concurrent Self Repair Scheme for Defects in Random Access Memories

Built-In Self-Repair (BISR) techniques are widely used for repairing embedded Random Access Memories (RAMs). One key component of a BISR module is the Built-In Redundancy-Analysis (BIRA) design. This paper presents an effective BIRA scheme which executes the 2-D redundancy allocation based on a 1-D local bitmap. Two BIRA algorithms for supporting two different redundancy organizations are also proposed. Simulation results show that the proposed BIRA scheme can provide high repair rate (i.e., the ratio of the number of repaired memories to the number of defective memories) for the RAMs with different fault distributions.

Provided by: International Journal of Innovative Technology and Exploring Engineering (IJITEE) Topic: Hardware Date Added: Sep 2012 Format: PDF

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