Download Now Free registration required
With an increase in the number of transistors on-chip, the complexity of the system also increases. In order to cope with the growing interconnect infrastructure, the "Network on chip (NoC)" concept was introduced. With network methodologies coming on-chip, various characteristics of traditional networks come into play. So far, failures that are common in regular networks were hardly considered onchip; this paper introduces ideas of dynamic routing in the context of NoCs and explains how they could be applied to cope with adverse physical effects of deep sub-micron technology.
- Format: PDF
- Size: 107.2 KB