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This paper describes a framework for the design space exploration of resource-efficient software-defined radio architectures. This design space exploration is based on a dual design flow, using a central processor specification as reference for the hardware development and the automatic generation of a C-compiler based tool chain. Using the authors' modular rapid prototyping environment RAPTOR and the RF-frontend DB-SDR, functional verification of SDR applications can be performed. An 802.11b transmitter SDR implementation is mapped on their CoreVA VLIW architecture and evaluated in terms of execution time and energy consumption. By introducing application specific instruction set extensions and a dedicated hardware accelerator, execution time and energy consumption could be reduced by about 90%.
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