A Gate Level Sensor Network for Integrated Circuits Temperature Monitoring

The authors present the first sensor network architecture to monitor Integrated Circuits (IC) thermal and energy activity. The sensor network consists of a set of simple gates, which are superimposed over the actual design of any IC. The sensing network and the actual IC design are completely disjoint in order to enable their simultaneous operation. Since the delay of gates is proportional to their temperature, they can obtain temperature of the network gates, by measuring the delay of the gates in the self-sensing network. Once they measured the delay of the circuit, they use CMOS temperature-delay relation and linear programming formulation to calculate the temperature at any point on the chip.

Provided by: Institute of Electrical and Electronics Engineers Topic: Hardware Date Added: Jan 2011 Format: PDF

Find By Topic