A Heterogeneous Multicore System on Chip With Run-Time Reconfigurable Virtual FPGA Architecture

System design, especially for low power embedded applications often profit from a heterogeneous target hardware platform. The application can be partitioned into modules with specific requirements, e.g. parallelism or performance in relation to the provided hardware blocks on the multi-core hardware. The result is an optimized application mapping and a parallel processing with lower power consumption on the different cores on the hardware. This paper presents a heterogeneous platform consisting of a microprocessor and a Field Programmable Gate Array (FPGA) connected via a standard AMBA bus. The novelty of this approach is that the FPGA is realized as virtual reconfigurable hardware upon a traditional off the shelf FPGA device.

Provided by: National Technical University of Athens Topic: Data Centers Date Added: Dec 2010 Format: PDF

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