A Low Power Reconfigurable Heterogeneous Architecture for A Mobile SDR System
The main challenge in designing a mobile wireless Software Defined Radio (SDR) system is to provide a solution that has high flexibility, hardware-like throughput, low power consumption, in addition to ease of programmability. In this paper, the authors propose a new architecture for SDR that is based on a Reconfigurable Instruction Cell Array (RICA). The architecture targets the IEEE 802.11g standard that includes Viterbi decoding, which is a key performance bottleneck. One of the salient novel features in this architecture, compared to existing solutions, is adopting a multi processor frame segmentation scheme when implement the 802.11 physical layer of the above standard.