Date Added: Dec 2011
In this paper a new low voltage CMOS mixer is proposed which is highly linear. Linearity is provided by adjusting the value of a resistor and sizing the aspect ratio of a PMOS transistor at the RF stage of a well known low voltage CMOS mixer. Simulation results of improved mixer in a 0.18?m CMOS technology illustrate 20 dB increases in IIP3. The mixer can operate at the minimum supply voltage as low as 1 V and the additional components which are used for improving linearity would not increase the power consumption significantly.