Processors

A Modular Fast Simulation Framework for Stream-Oriented MPSoC

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Executive Summary

The performance estimation of complex Multi-Processor Systems-on-Chip (MPSoC) in a reasonable amount of time and with a good accuracy becomes more and more challenging due to the increasing number of embedded components and the resulting complex interactions. In this paper, the authors present a modular trace based simulation framework, targeting the performance analysis of stream-oriented applications on complex MPSoC architectures. The framework can analyze systems with a large number of hardware components, while considering various aspects like resource sharing, multi-hop communication, and memory allocation. They demonstrate the potential of their framework by real-life case studies and obtain a speedup of several orders of magnitude and an average accuracy of 97% when compared with the execution on a commercial instruction-accurate simulator.

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