A New Low Voltage P-MOS Bulk Driven Current Mirror Circuit
In this paper, the authors propose a new low voltage current mirror circuit using bulk driven technique. Bulk driven technique is used to reduce the threshold of PMOS used in Low Voltage Current Mirror (LVCM) circuits. The proposed circuit consist of 4 PMOS and 5 NMOS. The proposed circuit operated at +0.85V supply voltage. The bandwidth of this circuit has also been enhanced using resistive compensation technique. The proposed circuit has been simulated in cadence design environment in UMC 180nm CMOS technology.