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As the Design For Testability (DFT) is essential in the semiconductor manufacturing, the scan-based architecture is widely used to decrease the test complexity of a chip. However, the scan-based architecture requires high test cost such as the test data volume and the test time. In order to alleviate the test cost problem of the scan-based architecture, a lot of test data compression schemes using the scan slice encoding have been presented. In this paper, the authors propose a new scan slice encoding scheme with flexible code for test data compression. The proposed scheme fully utilizes the flexible code as the control code or the data code.
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