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The increasing demand for portable computing has elevated power consumption to be one of the most critical embedded systems design parameters. In this paper, the authors present a precise high-level power estimation methodology for the software loaded on a VLIW processor that is based on a functional level power model. The targeted processor of their approach is the TMS320C6416T DSP from Texas Instrument. They consider several important issues in their model such as the pipeline stall, inter-instructions effect and cache misses. The contributions are the following.
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