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This paper describes the energy-efficient implementation of a high performance parallel radix-4 turbo decoder, which is designed to support multiple fourth-Generation (4G) wireless communication standards such as Mobile WiMAX and 3GPP-LTE. This paper proposes a new hardware architecture that can share hardware resources for the two standards. It mainly consists of eight retimed radix-4 Soft-Input Soft-Output (SISO) decoders to achieve high throughput and a dual-mode parallel hardware interleaver to support both Almost Regular Permutation (ARP) and Quadratic Polynomial Permutation (QPP) interleavers defined in the two standards. A prototype chip supporting both Mobile WiMAX and 3GPP-LTE standards is fabricated in a 0.13?m CMOS technology with eight metal layers.
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