AASH: An Asymmetry-Aware Scheduler for Hypervisors

Date Added: Mar 2010
Format: PDF

Asymmetric Multicore Processors (AMP) consist of cores exposing the same Instruction-Set Architecture (ISA) but varying in size, frequency, power consumption and performance. AMPs were shown to be more power efficient than conventional symmetric multicore processors, and it is therefore likely that future multicore systems will include cores of different types. AMPs derive their efficiency from core specialization: instruction streams can be assigned to run on the cores best suited to their demands for architectural resources.