Date Added: Jun 2014
Network-on-Chip (NoC) has recently emerged as an efficient communication solution for the System-on-Chip (SoC) design. Design space exploration and performance evaluation are the most essential task in NoC design. In this paper, an ABC based design space exploration framework for the NoC design is proposed. The objective of the design space exploration is to minimize the total energy consumption and maximum link bandwidth. This paper has considered many-many mapping between router and IPs instead of one-one mapping. The results show that the proposed framework saves around 40-50% of energy and around 10% of link bandwidth in compare to other contemporary techniques.