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Future inter- and intra-ULSI interconnect systems demand extremely high data rates (up to 100 Gbps/pin or 20-Tbps aggregate) as well as bidirectional multi-I/O concurrent service, reconfigurable computing/processing architecture and total compatibility with mainstream silicon system-on-chip and system-in-package technologies. In this paper, the authors review recent advances in interconnect schemes that promise to meet all of the above system requirements. Unlike traditional wired interconnects based solely on Time-Division Multiple Access for data transmission, these new interconnect schemes facilitate the use of additional multiple access techniques including Code Division Multiple Access and Frequency Division Multiple Access to greatly increase bandwidth and channel concurrency as well as to reduce channel latency. The physical transmission line is no longer limited to a direct-coupled metal wire.
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