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In today's many-core era, the interconnection networks have been the key factor that dominates the performance of a computer system. In this paper, the authors propose a design flow to discover the best topology in terms of the communication latency and physical constraints. First a set of representative candidate topologies are generated for the interconnection networks among computing chips; then an efficient multi-commodity flow algorithm is devised to evaluate the performance. The experiments show that the best topologies identified by the algorithm can achieve better average latency compared to the existing networks.
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