An Accurate System Architecture Refinement Methodology With Mixed Abstraction-Level Virtual Platform
The increasing complexity of today's System-On-a-Chip (SoC) design is challenging the design engineers to evaluate the system performance and explore the design space. Electronic System-Level (ESL) design methodology is of great help for attacking the challenges in recent years. In this paper, the authors present a system-level architecture refinement flow and implement a dual DSP cores virtual system based-on the highly accurate mixed abstraction-level modeling methodology. The constructed virtual platform can run various multimedia applications and achieve high accuracy.