An Analytical Approach to Design a Power-Efficient Single-Port Conventional Sram Bit-Cell for Mobile/multimedia Applications

The ever-increasing levels of on-chip integration in the recent years have led to increase in the density of Integrated Circuits (ICs) by scaling down the device geometries. Such high density circuits are capable of supporting high design complexities at very high speed at the cost of power, run time failures, and give rise to reliability issues. The other major factor behind the low power design is growing need for personal and portable computing devices, e.g., portable desktops, digital pens, audio and video based multimedia applications and wireless communications, e.g., PDA's and smart cards.

Provided by: International Journal of Engineering Science and Technology (IJEST) Topic: Mobility Date Added: Jan 2011 Format: PDF

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