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Field-Programmable Gate Array (FPGA) is widely used in reconfigurable systems. Since the configuration information for FPGA has to be stored in internal or external memory as bit streams, the limited memory size and access bandwidth become the key factors in determining the different functionalities that a system can be configured and how quickly the configuration can be performed. Bit stream compression is important in reconfigurable system design since it reduces the bit streams size and the memory requirement. It also improves the communication bandwidth and thereby decreases the reconfiguration time. Existing research in this field has explored two directions: efficient compression with slow decompression or fast decompression at the cost of compression efficiency.
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