An FPGA Implementation of a Parallelized MT19937 Uniform Random Number Generator

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Executive Summary

Recent times have witnessed an increase in use of high-performance reconfigurable computing for accelerating large-scale simulations. A characteristic of such simulations, like InfraRed (IR) scene simulation, is the use of large quantities of uncorrelated random numbers. It is therefore of interest to have a fast uniform random number generator implemented in reconfigurable hardware. While there have been previous attempts to accelerate the MT19937 pseudouniform random number generator using FPGAs the authors believe that they can substantially improve the previous implementations to develop a higher throughput and more area-time efficient design.

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