An Improved Algorithm for Slot Selection in the Ethereal Network-on-Chip
The rapid development in the electronics industry leads to a design process dominated by time-to-market constraints. The balance is shifted from logic design to packaging of al-ready existing IP which results in a search for solutions for interconnecting the IP blocks. Networks-on-chip allow the rapid development a scalable interconnect and with the use of Circuit switching they can also provide guarantees for the speed of communication between IPs. In this paper, the authors demonstrate an improvement in the allocation algorithms for a Time-Division-Multiplexing Circuit-Switching scheme. They prove their algorithm to be optimal and they find that it provides an improvement of up to 26.7% compared to the previously proposed algorithm.