An Improved Design of ALU Targeted to State-of-the-Art FPGAs
Even the simplest microprocessors or Central Processing Unit (CPU) of a computer has an Arithmetic Logic Unit (ALU). ALU is a digital circuit that performs arithmetic and logic operations. An engineer can design an ALU to make any operation. As the Arithmetic Logic Unit (ALU) is a fundamental building block of a Central Processing Unit (CPU) of a computer which performs arithmetic and logic operations, an attempt has been made to improve ALU by adding some algorithms like subtract, multiplier and square root etc. This improved design of ALU is simulated by using VHDL which targets rapidly expanding area of FPGAs. The synthesis is dominant design methodology.