Date Added: Oct 2012
The applications of network on chip has become wide .However, the implementation of 3D NoC has become a vital issue with the fabrication of TSV. Hence, this paper focuses on the means of reducing the number of vertical links in order to reduce the TSV. The optimum number of vertical for a given 3D mesh NoC is modeled as an optimization problem .The optimum number of vertical links is mapped using Ant Colony optimization to the given 3D mesh. The improvement in throughput and latency has been observed for synthetic traffic and real time benchmarks in comparison with the Simulated Annealing methodology. A 3D routing is proposed for the above vertical link optimized 3D NoC topology considering the congestion.