Date Added: Aug 2010
The paper presents the design of target architecture for benchmark application in a C based design flow. The work starts from the standard C implementation and generates customized designs using the NISC (no instruction set computer) toolset. Further, it demonstrates and analyzes the compilation and simulation results of several benchmarks on a number of different available NISC architectures in terms of code size, register, compilation time, etc. The compiled standard C implementation is made to run though benchmarks on a set of generic NISC architectures, which produces a set of results related with factorial calculation, nested for loop, simple if, etc. based on these outputs, a comparative analysis has been presented to explore different options to select the best set of architecture.