Processors

Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction Set Processors

Free registration required

Executive Summary

Program code in a computer system can be altered either by malicious security attacks or by various faults in microprocessors. At the instruction level, all code modifications are manifested as bit flips. In this work, the authors present a generalized methodology for monitoring code integrity at run-time in Application-Specific Instruction set Processors (ASIPs), where both the Instruction Set Architecture (ISA) and the underlying microarchitecture can be customized for a particular application domain. The authors embed monitoring microoperations in machine instructions, thus the processor is augmented with a hardware monitor automatically.

  • Format: PDF
  • Size: 742 KB