Architecture-Aware Optimization Targeting Multithreaded Stream Computing

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Executive Summary

Optimizing program execution targeted for Graphics Processing Units (GPUs) can be very challenging. The ability to efficiently map serial code to a GPU or stream processing platform is a time consuming task and is greatly hampered by a lack of detail about the underlying hardware. Programmers are left to attempt trial and error to produce optimized codes. Recent publication of the underlying Instruction Set Architecture (ISA) of the AMD/ATI GPU has allowed researchers to begin to propose aggressive optimizations. In this paper, the authors present an optimization methodology that utilizes this information to accelerate programs on AMD/ATI GPUs.

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