ASIC Implementation of Autocorrelation and CORDIC Algorithm for OFDM Based WLAN

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Executive Summary

This paper deals with design and implementation of Autocorrelator and CORDIC algorithm for OFDM based WLAN on ASIC. The architectures of both Autocorrelator and CORDIC are processed through ASIC Design flow to check for the timing of both setup as well as hold time for 130nm technology. Autocorrelator is designed to perform the autocorrelation of 128 samples each of 8 bits wide. The building blocks for the scheme have a 128x8 RAM, a multiplier, an accumulator and a counter. Matlab simulations are performed prior to the Verilog HDL coding to check if the functionality was achieved. Finally, an exhaustive test bench is written in Verilog HDL to simulate the design using ModelSim.

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