Software

Audio Power Amplifier Solutions for New Wireless Phones

Free registration required

Executive Summary

This paper presents a single chip class D amplifier with two selectable gains 6dB & 9dB, 1.4 W output power and 86% efficiency with an 8 ohm load. This chip uses a frequencies trimable ramp generator. Input Clock Frequency Range with 250kHz - 550kHz and 8 bits trim, 4 bits (LSB) to trim the ramp amplitude to vdd/5 peak-to-peak, 4 bits (MSB) to adjust the ramp continuity, the trimming procedures consists on putting a zero input signal, and adjust the trim code such as to get a 50% duty cycle Pulse Wide Modulation output signal, Reduction of intermodulation in case of mixing of Audio and Voice.

  • Format: PDF
  • Size: 283.3 KB