Hardware

Automatic Parallelization of Embedded Software Using Hierarchical Task Graphs and Integer Linear Programming

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Executive Summary

The last years have shown that there is no way to disregard the advantages provided by MultiProcessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using multiple cores in a single system enables to close the gap between energy consumption, problems concerning heat dissipation, and computational power. Nevertheless, these benefits do not come for free. New challenges arise, if existing applications have to be ported to these multiprocessor platforms. One of the most ambitious tasks is to extract efficient parallelism from these existing sequential applications.

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