BPSK Transmitter Design Using FPGA With DAC and Pulse Shaping Filter to Minimize Inter-Symbol Interference(ISI)

Free registration required

Executive Summary

In contrast to the sophisticated implementation of Binary Phase Shift Keying (BPSK) transmitter using Application Specific Integrated Circuit (ASIC), mixer, and Local Oscillator(LO) for carrier signal; Software Defined Radio (SDR) provides a high performance, efficient and re-configurable platform to integrate all these individual functions of BPSK transmitter. This paper presents a tutorial exploitation to design and implement BPSK transmitter using Field Programmable Gate Array (FPGA) for digital signal processing. The DSP-based BPSK transmitter is developed and compiled to VHDL (VHSIC Hardware Description Language) netlist. For proper interfacing D/A Converter (DAC) with FPGA, a HDL module of configurations of LTC-2624 Analog Module and clock synthesizer is integrated with the HDL netlist of BPSK transmitter.

  • Format: PDF
  • Size: 107.91 KB