Cache Contention and Application Performance Prediction for Multi-Core Systems

The ongoing move to Chip Multi-Processors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentially undermining performance improvements. Accurately modeling the impact of inter-process cache contention on performance and power consumption is required for optimized process assignment. However, techniques based on exhaustive consideration of process-to-processor mappings and cycle-accurate simulation are inefficient or intractable for CMPs, which often permit a large number of potential assignments. This paper proposes CAMP, a fast and accurate shared cache aware performance model for multi-core processors.

Provided by: Institute of Electrical and Electronics Engineers Topic: Data Centers Date Added: Jul 2010 Format: PDF

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