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In this work, the authors present an integrated solution to three classic problems in the field of performance analysis: memory modeling, synthetic address trace generation, and the creation of synthetic benchmark proxies for applications. First, they describe an intuitive characterization of memory access locality that can accurately predict an application's hit rates on arbitrary cache configurations, even when block sizes and cache depths change. They then describe the implementation of a memory tracer that can extract this characterization from applications and a software tool that can generate synthetic address traces to match. Lastly, they describe Chameleon, a fully tunable synthetic benchmark whose memory behavior can be dictated by the traces described above.
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