Date Added: Feb 2012
The authors propose a comprehensive yet low-cost solution for online detection and diagnosis of permanent faults in on-chip networks. Using error syndrome collection and packet/flit-counting techniques, high-resolution defect diagnosis is feasible in both data-path and control logic of the on-chip network without injecting any test traffic or incurring significant performance overhead. To satisfy the perpetual need of increasing processor performance while maintaining manageable levels of power consumption, multi-core systems have become the prevalent architectures for high performance computing. The number of processors on a single chip is increasing from few cores in Intel's quad-core processors to thousands of simple processors in Adapteva's Epiphany.