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In this paper, an iterative decoder for LDPC codes is proposed and analyzed. The messages exchanged between the nodes are binary vectors, and the information is conveyed by the number of ones rather than their positions in the vector. Regarding this aspect, the approach is similar to stochastic decoding techniques. The variable node decoders perform all the more complex processing, whereas the check node decoders perform simple bit-wise modulo-2 additions. The resulting structure is very attractive for hardware implementation. By selecting the length of these binary vector messages between one and infinity, the complexity and the performance of the decoder can be scaled between that of the original binary message passing algorithm and that of the sum-product algorithm.
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