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This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS architecture is enhanced with the minimum hardware to facilitate the complete system level support for different kinds of Modulations with minimal FPGA resources. The size of the ROM look up is reduced by using the mapping logic. The Design meets the present Software Define Radio (SDR) requirements and provides the user selection for desired modulation technique to be used. The VHDL programming language is used for modeling the hardware blocks for powerful and flexible programming and to avoid VHDL code generation tools.
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