Date Added: Sep 2013
Digital Signature schemes are commonly used as primitives in cryptographic protocols that provide other services including entity authentication, authenticated key transport, and authenticated key agreement. A VLSI implementation of the digital signature scheme is proposed in this paper, for efficient usage in any cryptographic protocol. This architecture is based on Secure Hash Function and the 512-bit RSA cryptographic algorithm. The whole design was captured by using VHDL language and a FPGA device was used for the hardware implementation of the architecture. A method to reduce the switching activity of the overall design is introduced. The proposed VLSI implementation of the Digital Signature scheme achieves a data throughput up to 32 Kbit/sec.